RT5752 datasheet(25/32 Pages) RICHTEK

25 / 32 page

RT5752

DS5752-03 November 2023

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Figure 12. Layout Guide for TSOT-23-6

CIN2

CIN1

Place the input MLCC capacitors as

close to the VIN and GND pins as

possible.

Connect feedback network

behind the output.

Add extra vias for thermal Dissipation.

Keep analog components

away from the SW node to

prevent stray capacitive noise

pickup.

The VIN trace should have enough

width, and use several vias to

shunt the high input current.

COUT

VOUT

VIN

Place the feedback components

next to the FB pin.

GND

VOUT

RFB2

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of the device.



Keep the high-current paths short, especially at the

ground terminals. This practice is essential for stable,

jitter-free operation. The high current path comprising

of input capacitor, high-side FET, inductor, and the output

capacitor should be as short as possible. This practice

is essential for high efficiency.



Place the input MLCC capacitors as close to the VIN

and GND pins as possible. The major MLCC capacitors

should be placed on the same layer as the RT5752.



SW node is with high frequency voltage swing and

should be kept at small area. Keep analog components

away from the SW node to prevent stray capacitive noise

pickup.



Connect feedback network behind the output capacitors.

Place the feedback components next to the FB pin.

For better thermal performance, to design a wide and thick

plane for GND pin or to add a lot of vias to GND plane.

An example of PCB layout guide is shown from Figure

12.

RT5752 Datasheet(PDF) 25 Page - Richtek Technology Corporation

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