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AM3359 Datasheet(PDF) 112 Page - Texas Instruments

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Part # AM3359
Description  AM335x Sitara™ Processors
PDF  256 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM3359 Datasheet(HTML) 112 Page - Texas Instruments

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AM335x
(ZCZ Package)
RTC_XTALIN
RTC_XTALOUT
N/C
LVCMOS
Digital
Clock
Source
VSS_RTC
VDDS_RTC
Copyright © 2016, Texas Instruments Incorporated
AM335x
(ZCE Package)
RTC_XTALIN
RTC_XTALOUT
N/C
LVCMOS
Digital
Clock
Source
VDDS_RTC
Copyright © 2016, Texas Instruments Incorporated
112
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
SPRS717L – OCTOBER 2011 – REVISED MARCH 2020
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
Power and Clocking
Copyright © 2011–2020, Texas Instruments Incorporated
(1)
Initial accuracy, temperature drift, and aging effects should be combined when evaluating a reference clock for this requirement.
6.2.2.4
OSC1 LVCMOS Digital Clock Source
Figure 6-15 shows the recommended oscillator connections when OSC1 of the ZCE package is connected
to an LVCMOS square-wave digital clock source and Figure 6-16 shows the recommended oscillator
connections when OSC1 of the ZCZ package is connected to an LVCMOS square-wave digital clock
source. The LVCMOS clock source is connected to the RTC_XTALIN terminal. The ground for the
LVCMOS clock source and VSS_RTC of the ZCZ package should be connected directly to the nearest
PCB digital ground (VSS). In this mode of operation, the RTC_XTALOUT terminal should not be used to
source any external components. The PCB design should provide a mechanism to disconnect the
RTC_XTALOUT terminal from any external components or signal traces that may couple noise into OSC1
through the RTC_XTALOUT terminal.
The RTC_XTALIN terminal has a 10- to 40-kΩ internal pullup resistor which is enabled when OSC1 is
disabled. This internal resistor prevents the RTC_XTALIN terminal from floating to an invalid logic level
which may increase leakage current through the oscillator input buffer.
Figure 6-15. OSC1 (ZCE Package) LVCMOS Circuit Schematic
Figure 6-16. OSC1 (ZCZ Package) LVCMOS Circuit Schematic
Table 6-7. OSC1 LVCMOS Reference Clock Requirements
NAME
DESCRIPTION
MIN
TYP
MAX
UNIT
ƒ(RTC_XTALIN)
Frequency, LVCMOS reference clock
32.768
kHz
Frequency, LVCMOS reference clock
stability and tolerance(1)
Maximum RTC error =
10.512 minutes/year
–20
20
ppm
Maximum RTC error = 26.28
minutes/year
–50
50
ppm
tdc(RTC_XTALIN)
Duty cycle, LVCMOS reference clock period
45%
55%
tjpp(RTC_XTALIN)
Jitter peak-to-peak, LVCMOS reference clock period
–1%
1%
tR(RTC_XTALIN)
Time, LVCMOS reference clock rise
5
ns
tF(RTC_XTALIN)
Time, LVCMOS reference clock fall
5
ns



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