AM3359 datasheet(126/256 Pages) TI1

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AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351

SPRS717L – OCTOBER 2011 – REVISED MARCH 2020

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Peripheral Information and Timings

7.7

External Memory Interfaces

The device includes the following external memory interfaces:

•

General-purpose memory controller (GPMC)

•

mDDR(LPDDR), DDR2, DDR3, DDR3L Memory Interface (EMIF)

7.7.1

General-Purpose Memory Controller (GPMC)

NOTE

For more information, see the Memory Subsystem and General-Purpose Memory Controller

section of the AM335x and AMIC110 Sitara Processors Technical Reference Manual.

The GPMC is the unified memory controller used to interface external memory devices such as:

•

Asynchronous SRAM-like memories and ASIC devices

•

Asynchronous page mode and synchronous burst NOR flash

•

NAND flash

7.7.1.1

GPMC and NOR Flash—Synchronous Mode

Table 7-23 and Table 7-24 assume testing over the recommended operating conditions and electrical

characteristic conditions shown in Table 7-22 (see Figure 7-17 through Figure 7-21).

Table 7-22. GPMC and NOR Flash Timing Conditions—Synchronous Mode

PARAMETER

MIN

TYP

MAX

UNIT

Input Conditions

Input signal rise time

Input signal fall time

Output Condition

CLOAD

Output load capacitance

Table 7-23. GPMC and NOR Flash Timing Requirements—Synchronous Mode

NO.

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

F12

tsu(dV-clkH)

Setup time, input data gpmc_ad[15:0] valid before output clock

gpmc_clk high

3.2

13.2

F13

th(clkH-dV)

Hold time, input data gpmc_ad[15:0]

valid after output clock gpmc_clk

high

Industrial extended

temperature

(-40°C to 125°C)

4.74

All other temperature ranges

4.74

2.75

F21

tsu(waitV-clkH)

Setup time, input wait gpmc_wait[x](1) valid before output clock

gpmc_clk high

3.2

13.2

F22

th(clkH-waitV)

Hold time, input wait gpmc_wait[x](1)

valid after output clock gpmc_clk

high

Industrial extended

temperature

(-40°C to 125°C)

4.74

All other temperature ranges

4.74

2.75

(1) In gpmc_wait[x], x is equal to 0 or 1.

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