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M68HC08 Datasheet(PDF) 201 Page - Freescale Semiconductor, Inc

Part # M68HC08
Description  Microcontrollers
PDF  288 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

M68HC08 Datasheet(HTML) 201 Page - Freescale Semiconductor, Inc

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DDC12AB Interface
MC68HC908BD48 — Rev. 2.1
Data Sheet
Freescale Semiconductor
DDC12AB Interface
201
BR2–BR0 — Baud Rate Select
These three bits select one of eight clock rates as the master clock
when the module is in master mode.
Since this master clock is derived the CPU bus clock, the user
program should not execute the WAIT instruction when the DDC
module in master mode. This will cause the SDA and SCL lines to
hang, as the WAIT instruction places the MCU in WAIT mode, with
CPU clock is halted. These bits are cleared upon reset. (See Table
15-3 . Baud Rate Select.)
Table 15-3. Baud Rate Select
BR2
BR1
BR0
Baud Rate
000
100k
001
50k
010
25k
011
12.5k
1
0
0
6.25k
1
0
1
3.125k
1
1
0
1.56k
1
1
1
0.78k
NOTE:
CPU bus clock is external clock ÷ 4 = 6MHz



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