OPA830 datasheet(21/56 Pages) TI

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7.3.3 Power-Down Operation

The OPA838 includes a power-down feature. Under logic control, the amplifier can switch from normal operation

to a standby current of less than 1 µA. When the PD pin is connected high (greater than or equal to 1.5 V

over the negative supply), the amplifier is active. Connecting the PD pin low (less than or equal to 0.55 V over

the negative supply) disables the amplifier. To protect the input stage of the amplifier, the device uses internal,

back-to-back diodes (two in series each way) between the inverting and noninverting input pins. If the differential

voltage in shutdown exceeds 1.2 V, those diodes turn on.

Actively drive the PD pin high or low; do not float this pin. If the power-down mode is not used, tie the PD pin to

the positive supply rail.

When the op amp is powered from a single-supply and ground, with PD driven from logic devices with similar

VDD voltages to the op amp, no special considerations are required. When the op amp is powered from a split-

supply with VS– less than ground, an open-collector type of interface with a pullup resistor is more appropriate.

Pullup resistor values must be less than 100 kΩ. Recovery from power down is illustrated in Figure 6-53 and

Figure 6-54 for several gains. In single-supply mode, with the gain resistor at ground, the output approaches the

positive supply on initial power-up until the internal nodes charge, and then recover to the target output voltage;

see Figure 6-51 and Figure 6-52.

7.3.4 Trade-Offs in Selecting The Feedback Resistor Value

The OPA838 is specified using a 1-kΩ feedback resistor with a 200-Ω gain resistor to ground in a noninverting

gain of 6 V/V configuration. These values give a good compromise, keeping the noise contribution of the

resistors well below that of the amplifier noise terms and minimal power in the feedback network as the output

voltage swing creates load current back into the feedback network. Decreasing these values improves the noise

at the cost of more power dissipated in the feedback network. Low values increase the harmonic distortion as

the feedback load decreases. Increasing the RF value at a particular gain increases the output noise contribution

of those resistors possibly becoming dominant. As the feedback resistor values continue to increase (and the

RG at a fixed target gain), there is a loss of phase margin as the impedance that drives the inverting input

capacitance brings in an added loop pole at lower frequencies. Figure 7-3 shows this at a gain of 6 V/V with

increasing RF values. This noninverting test shows more peaking as the RF values increase due to the 1-pF

common-mode input capacitance at the inverting input. The TINA simulation model gives excellent prediction of

these effects.

Frequency (Hz)

10k

100k

10M

100M

D063

RF = 1 k

RF = 2 k

RF = 5 k

RF = 10 k

RF = 20 k

Figure 7-3. Frequency Response With Various Feedback Resistor Values

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OPA838

SBOS867D – AUGUST 2017 – REVISED SEPTEMBER 2024

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