PM4388 datasheet(39/284 Pages) PMC

39 / 284 page

PM4388 TOCTL

DATA SHEET

PMC-960840

ISSUE 5

OCTAL T1 FRAMER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

9.7

Alarm Integrator (ALMI)

The Alarm Integration function is provided by the ALMI block. This block detects

the presence of Yellow, Red, and AIS Carrier Fail Alarms (CFA) in SF, or ESF

formats. The alarm detection and integration is compatible with the specifications

defined in ANSI T1.403 and TR-TSY-000191.

The ALMI block declares the presence of Yellow alarm when the Yellow pattern

has been received for 425 ms (± 50 ms); the Yellow alarm is removed when the

Yellow pattern has been absent for 425 ms (± 50 ms). The presence of Red

alarm is declared when an out-of-frame condition has been present for 2.55 sec

(± 40 ms); the Red alarm is removed when the out-of-frame condition has been

absent for 16.6 sec (± 500 ms). The presence of AIS alarm is declared when an

out-of-frame condition and all-ones in the PCM data stream have been present

for 1.5 sec (±100 ms); the AIS alarm is removed when the AIS condition has

been absent for 16.8 sec (±500 ms).

CFA alarm detection algorithms operate in the presence of a 10-3 bit error rate.

The ALMI also indicates the presence or absence of the Yellow, Red, and AIS

alarm signal conditions over 40 ms, 40 ms, and 60 ms intervals, respectively,

allowing an external microprocessor to integrate the alarm conditions via

software with any user-specific algorithms. Alarm indication is provided through

internal register bits.

9.8

Elastic Store (ELST)

The Elastic Store (ELST) synchronizes ingress frames to the common ingress

clock and frame pulse (CICLK, CIFP) in the Clock Slave ingress modes. The

frame data is buffered in a two frame circular data buffer. Input data is written to

the buffer using a write pointer and output data is read from the buffer using a

read pointer.

The elastic store can be bypassed to eliminate the 2 frame delay. In this

configuration (the Clock Master ingress modes), the elastic store is used to

synchronize the ingress frames to the transmit line clock (TLCLK[x]) so that per-

DS0 loopbacks may be enabled. Per-DS0 loopbacks are only available when the

elastic store is bypassed, or when CECLK and CICLK are tied together and

CEFP and CIFP are tied together, and the CICLKRISE and CECLKFALL register

bits are either both logic 1 or both logic 0. CICLKRISE and CECLKFALL are

found in registers 3 and 4 of each octant, respectively.

PM4388 Datasheet(PDF) 39 Page - PMC-Sierra, Inc

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