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PM4388 Datasheet(PDF) 40 Page - PMC-Sierra, Inc

Part # PM4388
Description  OCTAL T1 FRAMER
PDF  284 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM4388 Datasheet(HTML) 40 Page - PMC-Sierra, Inc

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PM4388 TOCTL
DATA SHEET
PMC-960840
ISSUE 5
OCTAL T1 FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
24
When the elastic store is being used, if the average frequency of the incoming
data is greater than the average frequency of the backplane clock, the write
pointer will catch up to the read pointer and the buffer will be filled. Under this
condition a controlled slip will occur when the read pointer crosses the next
frame boundary. The subsequent ingress frame is deleted.
If the average frequency of the incoming data is less than the average frequency
of the backplane clock, the read pointer will catch up to the write pointer and the
buffer will be empty. Under this condition a controlled slip will occur when the
read pointer crosses the next frame boundary. The previous ingress frame is
repeated.
A slip operation is always performed on a frame boundary.
For payload conditioning, the ELST inserts a programmable idle code into all
channels when the FRMR is out of frame synchronization. If the data is required
to pass through the TOCTL unchanged during an out-of-frame condition, then
the elastic store may be bypassed.
9.9
Signaling Extractor (SIGX)
The Signaling Extraction (SIGX) block provides signaling bit extraction from the
ingress stream for ESF, and SF framing formats. When the external signaling
interface is enabled, the SIGX serializes the bits into a serial stream aligned to
the synchronized outgoing data stream. The signaling data stream contains the
A,B,C,D bits in the lower 4 channel bit locations (bits 5,6,7,8) in ESF framing
format. In SF format, the A and B bits are repeated in locations C and D (i.e. the
signaling stream contains the bits ABAB for each channel). The SIGX also
provides user control over signaling freezing and provides control over signaling
bit fixing and signaling debounce on a per-DS0 basis. The block contains three
superframes worth of signal buffering to ensure that there is a greater than 95%
probability that the signaling bits are frozen in the correct state for a 50% ones
density out-of-frame condition, as specified in TR-TSY-000170 and BELL PUB
43801. With signaling debounce enabled, the per-DS0 signaling state must be in
the same state for 2 superframes before appearing on the serial output stream.
The SIGX indicates the occurrence of a change of signaling state for each DS0
via an interrupt and by a change of signaling state bit for each DS0.
9.10
Receive Per-DS0 Serial Controller (RPSC)
The RPSC allows data and signaling trunk conditioning to be applied on the
receive DS-1 stream on a per-DS0 basis. It also allows per-DS0 control of data
inversion, the extraction of clock and data on ICLK[x] and ID[x] (when the Clock



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