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PM4388 Datasheet(PDF) 49 Page - PMC-Sierra, Inc |
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PM4388 Datasheet(HTML) 49 Page - PMC-Sierra, Inc |
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49 / 284 page  PM4388 TOCTL DATA SHEET PMC-960840 ISSUE 5 OCTAL T1 FRAMER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 33 Figure 6 - DJAT Jitter Tolerance 100 10 1.0 0.1 110 100 1k 10k Jitter Frequency, Hz Jitter Amplitude, UIpp 0.01 100k 28 29 acceptable unacceptable 0.2 4.9 0.3k DJAT minimum tolerance The accuracy of the XCLK frequency and that of the reference clock used to generate the jitter attenuated clock have an effect on the minimum jitter tolerance. Given that the DJAT PLL reference clock accuracy can be ±200 Hz from 1.544 MHz, and that the XCLK input accuracy can be ±100 ppm from 37.056 MHz, the minimum jitter tolerance for various differences between the frequency of PLL reference clock and XCLK ÷ 24 are shown in Figure 7. An XCLK input accuracy of ±100 ppm is only acceptable if an accurate line rate reference is provided. If TJAT is left to free-run without a reference, or referenced to a derivative of XCLK, then XCLK accuracy must be ±32 ppm. |
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