PM4388 datasheet(71/284 Pages) PMC

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PM4388 TOCTL

DATA SHEET

PMC-960840

ISSUE 5

OCTAL T1 FRAMER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

CECLK2M:

The CECLK2M bit selects the 2.048 MHz data rate and format of the egress

data. When CECLK2M is set to logic 1, the clock rate on the CECLK input is

expected to be 2.048 MHz and the data stream on ED[x] and ESIG[x] is

expected to be formatted as 1 byte of "filler" followed by 3 bytes of channel

data, repeated 8 times. The format is precisely laid out in the Functional

Timing Diagrams section. When CECLK2M is set to logic 0, the egress data

rate and format is identical to T1 (i.e. 1.544MHz rate with 24 contiguous

channel bytes followed by 1 framing bit). When CECLK2M is set to logic 1,

then the SYNC bit must be set to logic 0 in the TJAT Configuration register

(Registers 01BH, 09BH, 11BH, 19BH, 21BH, 29BH, 31BH, 39BH.) and the

HSBPSEL bit in the Timing Options Register (007H, 087H, 107H, 187H,

207H, 287H, 307H, 387H) must be set to logic 1. PLLREF[1:0] should not be

set to 01 in the Timing Options Register unless the TJAT divisors are

specifically set to divide the 2048 kHz clock down to the line rate. CECLK2M

MUST BE SET TO LOGIC 0 WHEN THE CLOCK MASTER MODES ARE

SELECTED.

CESFP:

The CESFP bit selects the type of egress frame alignment signal, CEFP.

When CESFP is set to logic 1, a pulse on CEFP indicates the LAST F-bit of

the 12 frame SF or the 24 frame ESF (depending on the framing format

selected in the XBAS ). When CESFP is set to logic 0, a pulse on CEFP

indicates each framing bit. CESFP should be set to logic 1 when the external

signaling mode is active to ensure that the egress superframe is aligned to

the transmit line superframe.

ESFP:

The ESFP bit selects the output signal seen on EFP[x]. When set to logic 1,

the EFP[x] output pulses high during the first framing bit of the 12 frame SF or

the 24 frame ESF. When ESFP is set to logic 0, the EFP[x] output pulses

high during each framing bit (i.e. every 193 bits).

PM4388 Datasheet(PDF) 71 Page - PMC-Sierra, Inc