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PM7344 Datasheet(PDF) 113 Page - PMC-Sierra, Inc |
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PM7344 Datasheet(HTML) 113 Page - PMC-Sierra, Inc |
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113 / 293 page ![]() PM7344 S/UNI-MPH DATA SHEET PMC-950449 ISSUE 6 MULTI-PHY USER NETWORK INTERFACE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 97 Registers 011H, 111H, 211H and 311H: CDRC Interrupt Enable Bit Type Function Default Bit 7 R/W LCVE 0 Bit 6 R/W LOSE 0 Bit 5 R/W LCSDE 0 Bit 4 R/W EXZE 0 Bit 3 Unused X Bit 2 Unused X Bit 1 Unused X Bit 0 Unused X The bit positions LCVE, LOSE, LCSDE and EXZE of this register are interrupt enables to select which of the status events (Line Code Violation , Loss Of Signal, B8ZS/HDB3 Signature Detection, or Excessive Zeros Detection), either singly or in combination, are enabled to generate an interrupt on the INTB pin when they are detected. A logic 1 bit in the corresponding bit position enables the detection of these signals to generate an interrupt; a logic 0 bit in the corresponding bit position disables that signal from generating an interrupt. |
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