Electronic Components Datasheet Search
  English  ▼

X  

PM7344 Datasheet(PDF) 115 Page - PMC-Sierra, Inc

Part # PM7344
Description  SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE DEVICE
PDF  293 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7344 Datasheet(HTML) 115 Page - PMC-Sierra, Inc

Back Button PM7344 Datasheet HTML 111Page - PMC-Sierra, Inc PM7344 Datasheet HTML 112Page - PMC-Sierra, Inc PM7344 Datasheet HTML 113Page - PMC-Sierra, Inc PM7344 Datasheet HTML 114Page - PMC-Sierra, Inc PM7344 Datasheet HTML 115Page - PMC-Sierra, Inc PM7344 Datasheet HTML 116Page - PMC-Sierra, Inc PM7344 Datasheet HTML 117Page - PMC-Sierra, Inc PM7344 Datasheet HTML 118Page - PMC-Sierra, Inc PM7344 Datasheet HTML 119Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 115 / 293 page
background image
PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
99
Registers 013H, 113H, 213H and 313H: Alternate Loss of Signal Status
Bit
Type
Function
Default
Bit 7
R/W
ALTLOSE
0
Bit 6
R
ALTLOSI
X
Bit 5
Unused
X
Bit 4
Unused
X
Bit 3
Unused
X
Bit 2
Unused
X
Bit 1
Unused
X
Bit 0
R
ALTLOS
X
The alternate loss of signal status provides a more stringent criteria for the
deassertion of the alarm than the LOS indication in the CDRC Interrupt Status
register.
ALTLOSE:
If the ALTLOSE bit is a logic 1, an interrupt is generated when the ALTLOS
status bit changes state.
ALTLOSI:
The ALTLOSI bit is set high when the ALTLOS status bit changes state. It is
cleared when this register is read.
ALTLOS:
The ALTLOS bit is asserted based on the LOS[1:0] threshold selected in the
CDRC Configuration register. The ALTLOS bit is deasserted only after pulse
density requirements have been met. The pulse density requirements for the
T1 format specify that there must be N ones in each and every time window
of 8(N+1) data bits (where N can equal 1 through 23). The pulse density
requirements for the E1 format specify that 255 bit periods are observed
during which no sequence of four zeros is detected.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com