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PM7350 Datasheet(PDF) 61 Page - PMC-Sierra, Inc

Part # PM7350
Description  DUAL SERIAL LINK PHY MULTIPLEXER
PDF  241 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7350 Datasheet(HTML) 61 Page - PMC-Sierra, Inc

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RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
49
Table 4 Eight Bit SCI-PHY/Utopia Bus Master, Output Configuration
Byte
Register 0x14
#
bytes
01
2
7
INADD
UDF
H5
UDF
PRE
LEN
Notes
52
N
N
N
N
X
0
00
Short cell, no PHY ID is generated
53
N
N
N
Y
X
1
00
Default setting. Utopia compatible,
standard 53 byte cell, no PHY ID
53
N
Y
N
N
X
0
01
1 user byte, H1-H4, no PHY ID
54
N
Y
N
Y
X
1
01
1 user byte, H1-H5, no PHY ID
54
N
Y
Y
N
X
0
10
2 user bytes, H1-H4, no PHY ID
55
N
Y
Y
Y
X
1
10
2 user bytes, H1-H5, no PHY ID
Table 5 Sixteen Bit SCI-PHY/Utopia Bus Master, Output Configuration
Word
Register 0x14
#
bytes
01
4
INADD
UDF
H5
UDF
PRE
LEN
Notes
52
N
N
N
X
0
00
Short cell, no PHY ID
54
N
N
Y
X
1
00
Default, Utopia compatible, no PHY ID
54
N
Y
N
X
0
01
2 user bytes, H1-H4, no PHY ID
56
N
Y
Y
X
1
01
2 user bytes, H1-H4, H5/UDF, no PHY ID
9.1.2 SCI-PHY or Utopia Bus Slave
The SCI-PHY/Utopia bus slave format is enabled when the IANYPHY,
OANYPHY, IMASTER, and OMASTER inputs are all tied low.
In the ingress direction (cells are transferred from the parallel bus input port to
the LVDS links), the port presents itself as 32 PHY entities but is fully Utopia
Level 2 compatible when 31 or fewer PHYs are active and IAVALID is tied high.
Cells read from the bus are queued in a dedicated FIFO for each virtual PHY
(hereafter referred to as a logical channel). The ability of the FIFOs to accept
additional cells is discovered through polling using the IADDR[4:0] and IAVALID
inputs. Upon IAVALID being sampled high the ICA output is asserted if the cell
FIFO for the logical channel addressed by IADDR[4:0] has at least one empty
cell buffer. If the FIFO is full, ICA is deasserted. If a cell transfer is in progress
that will fill a logical channel FIFO, ICA will also be deasserted. If IAVALID is
sampled low (in SCI-PHY mode) ICA becomes high impedance.
When operating as a SCI-PHY/Utopia interface, a cell transfer is effected by the
assertion low of IENB. The logical channel FIFO to which the cell is written is
selected by the IADDR[4:0] value sampled when IENB was last sampled high.



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