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MCP16502 Datasheet(PDF) 30 Page - Microchip Technology

Part # MCP16502
Description  High-Performance PMIC for SAMA5DX/SAM9X6/SAM9X7/SAMA7G Series MPUs
PDF  86 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP16502 Datasheet(HTML) 30 Page - Microchip Technology

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MCP16502
DS20006275D-page 30
 2019-2022 Microchip Technology Inc. and its subsidiaries
4.4.6
RESTART SEQUENCE AFTER
FAULT AND AUTOMATIC WAKE-UP
PULSE (AWKP) GENERATION
The power-up sequence is also automatically executed
when reacting to severe Fault conditions. Please see
Section 5.5 “Protections” for information on which
Faults may trigger a new restart sequence. In the
default configuration (i.e., HCPEN bit is ‘0’ for the Buck
channels), as soon as a Fault is detected, the power
delivery on all channels is terminated and the
MCP16502 waits for 100 ms. After this wait time, a new
start-up sequence is generated in the attempt to restart
the system correctly.
A special feature is provided to enable system recovery
if there is a restart sequence after a Fault occurs while
in Hibernate mode. In Hibernate mode, the PWRHLD
had been previously set to low by the MPU and the
MPU expects a wake-up event in order to set PWRHLD
to high again. This must be a hardware event, which is
flagged to some I/O inside the MPU Shutdown and
Wake-up Controller (SHDWC) block (e.g., a logic
transition on a WKUPx or PIOBUx pin).
However, if a Fault (e.g., a short circuit on a Buck chan-
nel having HCPEN = 0 and left turned on during Hiber-
nate) causes a restart sequence while in Hibernate
mode, the restart sequence is not successfully com-
pleted until a wake-up event is generated for the MPU
SHDWC, because the PWRHLD remains low. It is nec-
essary for the PWRHLD signal to be high just prior to
the completion of the start-up sequence so that nRSTO
can be deasserted. This is solved by generating from
the MCP16502 an Automatic Wake-up Pulse (AWKP)
on the nSTRTO output if the Fault that generates a
restart sequence has occurred while in Hibernate
mode.
The Automatic Wake-up Pulse generation can be
optionally disabled by the user by setting the AWKPDIS
bit (bit 4) in the SYS-CFG register (0x03). The AWKP
function is enabled by default.
The timing diagram of a restart sequence caused by a
Fault while in Hibernate mode is shown in Figure 4-11.
Just before initiating the restart sequence, the
MCP16502 generates a 25 ms (nominal duration)
Automatic Wake-up Pulse on the nSTRTO output, even
in lack of a low level on the nSTRT input. This is the
only situation where the nSTRTO logic level does not
reflect the nSTRT input status. The duration of the
AWK Pulse erodes into the 100 ms waiting time that
precedes the automatic restart sequence.
PWRHLD will typically return high as soon as the
nSTRTO signal is detected to be low by the MPU
SHDWC. If LPM stays high for any reason, the
MCP16502 will go in Low-Power mode immediately after
the automatic start-up sequence. This behavior is shown
in Figure 2-24 in Section 2.0 “Typical Performance
Curves”.
If the restart sequence after a Fault is executed in any
other operational state but Hibernate, PWRHLD will
either be already high (in applications with backup
power) or it would return high as soon as the VDDIO rail
is started, thus making the generation of the Automatic
Wake-up Pulse not necessary.
FIGURE 4-11:
Automatic Wake-Up Pulse
Generation Timing Diagram (Fault during
Hibernate).
VIN
Fault
Event
PWRHLD
Wait 100 ms
(internal logic signal)
nSTRTO
nRSTO
time
LPM
Hibernate
Automatic Start-up Sequence
State
nSTRT
25 ms
100 ms
Wait after Fault
ACTIVE
75 ms
t
restart
t
5
t
5
Where:
trestart = Duration of the automatic start-up
(restart) sequence
t5 = Minimum setup/hold time: Min. 0 µs
(internal filtering applies)



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