MCP16502 datasheet(77/86 Pages) MICROCHIP

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DS20006275D-page 77

MCP16502

5.5.2

PWM MODE NEGATIVE CURRENT

LIMIT PROTECTION (BUCK

CHANNELS)

The Buck channels of the MCP16502 also feature a

negative inductor current limit protection when operat-

ing in Forced PWM mode. This prevents dangerous

current levels in the power train. If the inductor current

reaches the low-side Negative Peak Current Limit

(ILIM_NEGx) while the low-side MOSFET is conducting,

the low-side MOSFET is turned off and the inductor

current is pushed to the input voltage, either through

the body diode of the high-side MOSFET (if turned off)

or its channel (when turned on by the control loop).

Since this feature is only intended to protect the device

in some particular transient conditions (such as a large

decrease of the ouput voltage setting associated with

an extremely large capacitive load), it is only reported

through I2C, but it does not cause the assertion of the

nRSTO (Reset) signal.

This protection should never be exercised continuously

and/or without a large input bulk capacitor because it

may quickly destroy the device.

When this protection is engaged, energy is pumped

back from the output into the input voltage. If the input

supply has no sinking capability and/or the input bulk

decoupling cap is not large enough, the input voltage

will rise to the point where the device is permanently

damaged.

5.5.3

LDO CURRENT LIMIT PROTECTION

LDOs are protected against short circuit by a linear

constant-voltage/constant-current (i.e., brick wall) output

characteristic. The output current under short-circuit

conditions is not intermittent. Therefore, the internal

power dissipation in the MCP16502 can reach high

levels under LDO short-circuit conditions. The current

limit condition of each LDO is also reported through I2C.

The intervention of the LDO current limit protection does

not cause the assertion of the nRSTO (Reset) signal.

5.6

Maximum Simultaneous

Capacitive and DC Loading in

Soft Start and DVS

The Current-mode architecture of the Buck channels in

the MCP16502 make them tolerant to additional

capacitive loads from the stability point of view.

However, since the Hiccup mode overcurrent protection

is also enabled during soft start and DVS ramping, the

user needs to be aware that additional load capacitance,

distributed on the application board, may cause the

intervention of the Hiccup mode protections under

dynamic conditions (rising output voltage).

This is especially important for Buck1 since the I/O rail

(typically 3.3V) can be used for a wide variety of loads and

its total distributed capacitive load could significantly

exceed the minimum recommended nominal capacitance

value (i.e., 22 µF).

Using the symbols listed in the “AC/DC Characteristics”

table, Equation 5-1 establishes the maximum allowable

capacitive load, Cadd_max, to prevent the cycle-by-cycle

current limit from being engaged.

Complying with this condition will ensure that Hiccup

mode overcurrent protection will not be activated

during the soft start ramp or DVS transitions in the

positive direction.

Failing to comply with the condition formulated below

does not necessarily mean that Hiccup mode

protection will be engaged. The digital filtering provided

in the Hiccup mode overcurrent algorithm, as described

in Section 5.5.1 “Overcurrent Protection (Buck

Channels)”, provides immunity to single, and even

multiple cycle-by-cycle current limit events and allows

operation in proximity of the high-side current limit for a

significant amount of time during the soft start or DVS

ramping.

EQUATION 5-1:

As a consequence, the maximum value of additional

capacitance, Cadd_max, that can be observed by

experiments is significantly higher than the limit

calculated with the aforementioned formula.

Cadd_max

ILIM_HS

-------------------- I

OUT

–





SSRXX

Vstep fsw



------------------------ C

OUT

–



Where:

ILIM_HS = High-Side MOSFET Current Limit

r = Ratio of the peak inductor current,

ILpk, to average inductor current at

the point where ILpk =ILIM_HS. For

simplicity, assume r = 1 since the

peak-to-peak inductor current ripple

will be small in comparison to the

average inductor current value when

the high-side current limit is engaged.

IOUT = Output Current of the Buck Converter

Vstep = Output Voltage Step in SS (or DVS)

SSRXX = Soft Start Rate (or DVS Rate),

XX = 00, 01, 10, 11

fsw = Switching Frequency

COUT = Output capacitance already present

on the Buck converter output

(typically, COUT =22 µF)

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