Electronic Components Datasheet Search
  English  ▼

X  

R2023K Datasheet(PDF) 50 Page - RICOH electronics devices division

Part # R2023K
Description  2-wire Serial Interface Real Time Clock IC
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RICOH [RICOH electronics devices division]
Direct Link  http://www.ricoh.com
Logo RICOH - RICOH electronics devices division

R2023K Datasheet(HTML) 50 Page - RICOH electronics devices division

Back Button R2023K Datasheet HTML 42Page - RICOH electronics devices division R2023K Datasheet HTML 43Page - RICOH electronics devices division R2023K Datasheet HTML 44Page - RICOH electronics devices division R2023K Datasheet HTML 45Page - RICOH electronics devices division R2023K Datasheet HTML 46Page - RICOH electronics devices division R2023K Datasheet HTML 47Page - RICOH electronics devices division R2023K Datasheet HTML 48Page - RICOH electronics devices division R2023K Datasheet HTML 49Page - RICOH electronics devices division R2023K Datasheet HTML 50Page - RICOH electronics devices division  
Zoom Inzoom in Zoom Outzoom out
 50 / 50 page
background image
R2023K/T
50
• Interrupt Process
(1) Periodic Interrupt
*2)
Other Interrupt
Processes
Set Periodic Interrupt
Cycle Selection Bits
CTFG=1?
Conduct
Periodic Interrupt
Yes
No
Control Register 2
←
(X1X1X011)
Generate Interrupt to CPU
*1)
(2) Alarm Interrupt
*3)
Other Interrupt
Processes
Set Alarm Min., Hr., and
Day-of-week Registers
WAFG or DAFG=1?
Conduct Alarm Interrupt
Yes
No
Control Register 2
←
(X1X1X101)
Generate Interrupt to CPU
*1)
WALE or DALE
←0
*2)
WALE or DALE
←1
*1) This step is intended to once disable the alarm
interrupt circuit by setting the WALE or DALE bits to
0 in anticipation of the coincidental occurrence of a
match between current time and preset alarm time in
the process of setting the alarm interrupt function.
*2) This step is intended to enable the alarm
interrupt function after completion of all alarm
interrupt settings.
*3) This step is intended to once cancel the alarm
interrupt function by writing the settings of "X,1,X,
1,X,1,0,1" and "X,1,X,1,X,1,1,0" to the Alarm_W
Registers and the Alarm_D Registers, respectively.
*1) This step is intended to select the level mode
as a waveform mode for the periodic interrupt
function.
*2) This step is intended to set the CTFG bit to 0
in the Control Register 2 to cancel an interrupt to
the CPU.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com