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AM67 Datasheet(PDF) 87 Page - Texas Instruments |
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AM67 Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 237 page  6.5 Operating Performance Points Table 6-1 defines the maximum operating frequency of the clocks for each device speed grade and Table 6-2 defines the only valid Operating Performance Points (OPPs) for the device subsystem and core clocks.. Table 6-1. Device Speed Grades Speed Grade VDD_CORE (V)(1) MAXIMUM OPERATING FREQUNCY (MHz) MAXIMUM DATA RATE (MT/s)(2) A53SS (Cortex- A53x) C7/MMA R5FSS0 MAIN DOMAIN SYSCLK MCU R5F MCU DOMAIN SYSCLK DEVICE MGR R5F DEVICE MGR DOMAIN CLK HSM GPU VPAC DMPAC VPU LPDDR4 J 0.75 1250 912.5 800 500 800 400 800 400 400 720 600 428.5 500 3200 to 3733 K 0.85 1400 1000 800 3466 to 4000 (1) Nominal operating voltage, see Section 6.4. (2) Maximum DDR Frequency will be limited based on the specific memory type (vendor) used in a system and by PCB implementation. Refer to LPDDR4 Board Design and Layout Guidelines for the proper PCB implementation to achieve maximum DDR frequency. It is recommended that software uses the minimum required LPDDR4 transfer rate that satisfies the performance requirements of the system. Table 6-2. Device Operating Performance Points OPP A53SS(1) C7/MMA FIXED OPERATING FREQUENCY OPTIONS (MHz)(2) MT/s(3) R5FSS0 MAIN DOMAIN SYSCLK MCU R5F MCU DOMAIN SYSCLK DEVICE MGR R5F DEVICE MGR DOMAIN CLK HSM GPU VPAC DMPAC VPU LPDDR4 High From PLL BP to Speed Grade Max From PLL BP to Speed Grade Max 800 500 800 400 800 400 400 Speed Grade Max 600 428.5 500, 400, 200, or 100 From PLL BP to Speed Grade Max Low 400 250 400 200 400 133 133 (1) Default operating frequency, set by software at boot. Supports Dynamic Frequency Scaling after boot. (2) Fixed operating frequency, set by software at boot. (3) Maximum DDR Frequency will be limited based on the specific memory type (vendor) used in a system and by PCB implementation. Refer to LPDDR4 Board Design and Layout Guidelines for the proper PCB implementation to achieve maximum DDR frequency. www.ti.com AM67, AM67A SPRSPA3A – MARCH 2024 – REVISED SEPTEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 87 Product Folder Links: AM67 AM67A |
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