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AS8267 Datasheet(PDF) 98 Page - ams AG |
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AS8267 Datasheet(HTML) 98 Page - ams AG |
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98 / 136 page ![]() Data Sheet AS8267 / AS8268 Revision 1.0, 19-Jun-07 Page 98 of 136 Memory Maps The 8051 MCU is configured as Von Neumann architecture merging program and data range into one 64kB address space. This space is completely accessible via MOVX and partly accessible via MOVC (0000h – 5FFFh). Besides, there is the typical 8051 structure with 128 bytes of internal memory (I_RAM) and the special function registers (SFRs) also in a 128 byte address space. SFRs Direct addressing FFh 80h 128 bytes I_RAM 7Fh 00h Internal Memory unused FFFFh C000h XDATA Memory Special Function Registers unused A000h 1kB X_RAM 32kB FLASH 7FFFh 0000h 9000h 8000h unused 9FFFh MPIO LCDD DSP SPI RTC SCT 9500h 9400h 9300h 9200h 9100h 9000h Direct addressing Register indirect addressing Register addressing MOVX A, @DPTR (4 banks) MOVX @DPTR, A Bit addressing MOVC A, @A+PC MOVC A, @A+DPTR } only for 0000h – 7FFFh MOVX @Ri, A MOVXA, @Ri with Ri ε {R0, R1}, P2 represents upper address bits FLASH Memory The Flash memory shares address and output data lines with the X_RAM. 32kB out of 64kB addressable memory are used: 0000h – 7FFFh for program data storage. |
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