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AS8267 Datasheet(PDF) 99 Page - ams AG

Part # AS8267
Description  Single-Phase 2-Current Energy Measurement Integrated Circuits with Microcontroller, RTC, Programmable Multi-Purpose I/Os
PDF  136 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS8267 Datasheet(HTML) 99 Page - ams AG

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Data Sheet AS8267 / AS8268
Revision 1.0, 19-Jun-07
Page 99 of 136
Data Memory (X_RAM) and Block Interfaces
The following table shows the start (and stop) addresses for the X_RAM and the block interfaces.
These locations can be accessed with the MOVX instruction.
Start
Address
Stop
Address
Contents
8000h
83FFh
X_RAM
9000h
9007h
SCT
9100h
9134h
RTC
9180h
9184h
WDT
9200h
9220h
LCDD
9300h
9338h
DSPREG (MDR/SREG)
9400h
9403h
EEP_SPI
9500h
951Fh
MPIO
9600h
9604h
TEMPSENS
9700h
9701h
FLASH (STAT/ATTACK)
Detailed Memory map:
Address Contents
Address Contents
Address Contents
Address Contents
8000h
…
83FFh X_RAM
X_RAM
9000h
-
9001h enable signals
9002h clkdiv[2:0]
9003h -
SCT
9100h
Seconds/VL
9101h Minutes
9102h Hours
9103h Days
9104h
Weekdays
9105h
Months/Cent.
9106h Years
9107h -
9108h
-
9109h -
910Ah -
910Bh -
910Ch -
910Dh -
910Eh -
910Fh -
9110h
Cont./Status1
9111h
Cont./Status2
9112h Sec.Tim.B 0
9113h Sec.Tim.B 1
9114h
Min.Alarm 1
9115h Hour Alarm 1
9116h Day Alarm 1
9117h Mon. Alarm 1
9118h
YearsAlarm 1
9119h Min.Alarm 2
911Ah Hour Alarm 2
911Bh Day Alarm 2
911Ch Mon. Alarm 2
911Dh YearsAlarm 2
911Eh -
911Fh -
9130h
DivReg B 0
9131h DivReg B 1
9132h DivReg B 2
9133h Freq. Trim
RTC
9180h
WDTE
9181h
WDTCLK
WDT
9200h
reg1[7:0]
9201h
reg1[15:8]
9202h reg1[23:16]
9203h reg1[31:24]
9204h
reg1[39:32]
9205h
reg1[47:40]
9206h reg1[55:48]
9207h reg1[63:56]
9208h
reg1[71:64]
9209h
reg1[79:72]
920Ah reg1[87:80]
920Bh reg1[95:88]
920Ch -
920Dh -
920Eh -
920Fh -
9210h
reg2[7:0]
9211h
reg2[15:8]
9212h reg2[23:16]
9213h reg2[31:24]
9214h
reg2[39:32]
9215h
reg2[47:40]
9216h reg2[55:48]
9217h reg2[63:56]
9218h
reg2[71:64]
9219h
reg2[79:72]
921Ah reg2[87:80]
921Bh reg2[95:88]
921Ch -
921Dh -
921Eh use_reg
921Fh selvlcd[2:0]
LCDD



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