TMP89FS60 datasheet(194/410 Pages) TOSHIBA

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Page 180

14. 8-bit Timer Counter (TC0)

TMP89FS60

RA002

14.4.3 8-bit pulse width modulation (PWM) output mode

The pulse-width modulated pulses with a resolution of 7 bits are output in the 8-bit PWM mode. An addi-

tional pulse can be added to the 2

× n-th duty pulse. This enables PWM output with a resolution nearly equiva-

lent to 8 bits. (n=1, 2, 3...)

The operation of TC00 is described below, and the same applies to the operation of TC01.

14.4.3.1 Setting

TC00 is put into the 8-bit PWM mode by setting T00MOD<TCM0> to "10" and T001CR<TCAS> to

"0". Set T00MOD<EIN0> to "0" and select the clock at T00MOD<TCK0>. Set the count value to be used

for the match detection and the additional pulse value at the PWM register T00PWM.

Set T00MOD<DBE0> to "1" to use the double buffer.

Setting T001CR<T00RUN> to "1" starts the operation. After the timer is started, writing to T00MOD

becomes invalid. Be sure to complete the required mode settings before starting the timer.

In the 8-bit PWM mode, the T00PWM register is configured as follows:

PWMDUTY is a 7-bit register used to set the duty pulse width value (the time before the first output

change) in a cycle (128 counts of the source clock).

PWMAD is a register used to set the additional pulse. When PWMAD is "1", an additional pulse that

corresponds to 1 count of the source clock is added to the 2

× n-th duty pulse (n=1, 2, 3...). In other words,

the 2

× n-th duty pulse has the output of PWMDUTY+1.

The additional pulse is not added when PWMAD is "0".

Timer register 00

T00PWM

76543

210

(0x0028)

Bit Symbol

PWMDUTY

PWMAD

Read/Write

R/W

After reset

11111

111

Timer register 01

T01PWM

76543

210

(0x0029)

Bit Symbol

PWMDUTY

PWMAD

Read/Write

R/W

After reset

11111

111

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