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TMPR4951B Datasheet(PDF) 97 Page - Toshiba Semiconductor

Part # TMPR4951B
Description  64-Bit TX System RISC TX49 Family
PDF  256 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4951B Datasheet(HTML) 97 Page - Toshiba Semiconductor

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Chapter 4 Memory Management System
4-15
64-bit Kernel Mode, Physical Spaces (xkphys)
In Kernel mode, when KX = 1 in the Status register and bits 63-62 of the 64-bit virtual address
are 102, one of the two unmapped xkphys address spaces are selected, either cached or uncached.
Accesses with address bits 58-36 not equal to 0 cause an address error.
References to this space are not mapped; the physical address selected is taken from bits 35-0 of
the virtual address.
Bits 61-59 of the virtual address specify the cacheability and coherency
attributes, as shown in Table 4.2.5.
Table 4.2.5 Cacheability and Coherency Attributes
Value(61-59)
Cacheability and Coherency Attributes
Starting Address
0
Cacheable, non-coherent, write-through, no write
allocate
0x8000 0000 0000 0000
1
Cacheable, non-coherent, write-through, no write
allocate
0x8800 0000 0000 0000
2
Uncached
0x9000 0000 0000 0000
3
Cacheable, non-coherent
0x9800 0000 0000 0000
4-7
Reserved
0xA000 0000 0000 0000
64-bit Kernel Mode, Kernel Space (xkseg)
In Kernel mode, when KX
= 1 in the Status register and bits 63-62 of the 64-bit virtual address
are 112, the address space selected is one of the following:
•
kernel virtual space, xkseg, the current kernel virtual space; the virtual address is extended
with the contents of the 8-bit ASID field to form a unique virtual address
•
one of the four 32-bit kernel compatibility spaces, as described in the next section.
64-bit Kernel Mode, Compatibility Spaces (ckseg1~0, cksseg, ckseg3)
In Kernel mode, when KX = 1 in the Status register, bits 63-62 of the 64-bit virtual address are
112, and bits 61-31 of the virtual address equal-1, the lower two bytes of address, as shown in
Figure 4.2.3, select one of the following 512 Mbytes compatibility spaces.
•
ckseg0.
This 64-bit virtual address space is an unmapped region, compatible with the 32-bit
address model kseg0. The K0 field of the Config register, described in this chapter,
controls cacheability and coherency.
•
ckseg1.
This 64-bit virtual address space is an unmapped and uncached region, compatible
with the 32-bit address model kseg1.
•
cksseg.
This 64-bit virtual address space is the current supervisor virtual space, compatible
with the 32-bit address model ksseg.
•
ckseg3.
This 64-bit virtual address space is kernel virtual space, compatible with the 32-bit
address model kseg3.



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