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TMP88CS38 Datasheet(PDF) 203 Page - Toshiba Semiconductor |
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TMP88CS38 Datasheet(HTML) 203 Page - Toshiba Semiconductor |
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203 / 226 page  TMP88CS38/CM38A/CP38A 2007-09-12 88CS38-203 Figure 2.15-31OSD Control Register List (2/2) Register Bit Configuration Register Address Register Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit Contents 00FBB ORIV VDPOL HDPOL YBLII RGBII YIV BLIV RGBIV IIV VDPOL: VD input polarity select HDPOL: HD input polarity select YBLII: Y/BLIN input polarity select RGBII: RIN, GIN, BIN input select YIV: Y output polarity select BLIV: BL output polarity select RGBIV: R, G, B output polarity select IIV: I pin polarity select 00024 DMA7 DMA6 DMA5 DMA4 DMA3 DMA2 DMA1 DMA0 00025 ORDMA − − − − − − − DMA8 DMAx: Display memory address setting (x: 0 to 8) 0001D ORDSN − SLNT EUL BLF IDT RDT GDT BDT SLNT: Slant EUL: Underline BLF: Blinking IDT/RDT/CDT/BDT: Character color 0001E CRA7 CRA6 CRA5 CRA4 CRA3 CRA2 CRA1 CRA0 0001F ORCRA − − − − − − − CRA8 CRAx: Character code (x: 0 to 8) 00FBC WVSH7 WVSH6 WVSH5 WVSH4 WVSH3 WVSH2 WVSH1 WVSH0 00FBD ORWVSH − − − − − − − WVSH8 WVSHx: Window upper limit position (x: 0 to 8) 00FBE WVSL7 WVSL6 WVSL5 WVSL4 WVSL3 WVSL2 WVSL1 WVSL0 00FBF ORWVSl − − − − − − − WVSL8 WVSL: Window lower limit position (x: 0 to 8) 00F80 ORDON − − − − − RGWR EWDW DON RGWR: Writing data transfer control EWDW: Window enable DON: OSD display ON/OFF Note 1: Except the meshed registers are changed by RGWR. Note 2: Only lower 2 bits of the register in address 00F80H are changed by RGWR (the register in address 00F80H must not be used with any of the read-modify-write instructions as SET, CLR, etc.). |
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