IR35211 datasheet(21/58 Pages) IRF

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Dual Output Digital Multi-Phase Controller

IR35211

July 24, 2014 | V1.00

Figure 14: OCP_L (VR_HOT) assertion with

OCP_TDC (Slow) threshold. OCP delay action (22usec)

Thermal Based Protection

The IR35211 can also assert the PROC_HOT_L

(VR_HOT) pin when the temperature of the VR

exceeds a configurable temp_max threshold (typically

100°C). If the temperature continues to rise and

exceeds a second configurable threshold

(OTP_thresh) then the VR will shut down and latch

off. The VR can only be restarted if ENABLE or VCC

is cycled.

AMD SVI Address Programming

By default, loop 1 is addressed as the VDD rail and

loop 2 is addressed as the VDDNB rail which is

sufficient for most applications. The IR35211 however,

can also be configured with a single bit change to

swap this addressing scheme so that loop 1 can be

addressed as the VDDNB rail and loop 2 can be

addressed as the VDD rail. This is for application

where the VDDNB requires more than two phases

and VDD only requires two.

AMD GPU 2-BIT VID AND SVI MODES

Boot Voltage

The boot voltage is fully programmable in MTP to the

range shown in Table 8. Table 16 shows the Boot VID

table.

TABLE 8: VBOOT RANGE

Loop

Boot Voltage

Loop 1

Any VID code

Loop 2

Any VID code

The IR35211 provides flexible sequencing options

which are configured in MTP per Table 9.

TABLE 9: SEQUENCE MODE TABLE

Loop 1 & Loop 2 start together (default)

Loop 2 starts when Loop 1 VRRDY=high

Loop 1 starts when Loop 2 VRRDY=high

Additionally, a start-up delay of values shown in Table 10

can be inserted immediately after the EN signal is driven

high or in between the sequencing of the two loops

(Table 11).

TABLE 10: START-UP DELAY

0.0 ms (default)

0.25 ms

0.5 ms

1.0 ms

2.5 ms

5.0 ms

10.0 ms

TABLE 11: DELAY POSITION

After ENABLE

Between the 2 loops

The slew rates for both loops are set independently.

Some common start-up combinations are shown in

Figure 15 and Figure 16.

Figure 15: Loop 1 & Loop 2 start together

with 0.25ms delay from Enable

OCP Delay

(slow)

Over-current

detected

VR shuts

down

Vdd

Idd

OCP_L

IR35211 Datasheet(PDF) 21 Page - International Rectifier

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