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IR35211 Datasheet(PDF) 12 Page - International Rectifier

Part # IR35211
Description  Dual Output Digital Multi-Phase Controller
PDF  58 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR35211 Datasheet(HTML) 12 Page - International Rectifier

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Dual Output Digital Multi-Phase Controller
IR35211
www.irf.com   |  © 2014 International Rectifier
July 24, 2014  |  V1.00
12
GENERAL DESCRIPTION
The IR35211 is a flexible, dual-loop, digital multiphase
PWM buck controller optimized to convert a 12V input
supply to the core voltage required by Intel and AMD
high performance microprocessors and DDR memory.
It is easily configurable for 1-3 phase operation on
Loop #1 and 0-1 phase operation on Loop #2.
The unique partitioning of analog and digital circuits
within the IR35211 provides the user with easy
configuration capability while maintaining the required
accuracy and performance. Access to on-chip Multiple
Time Programming memory (MTP) to store the
IR35211 configuration parameters enables power
supply designers to optimize their designs without
changing external components.
The IR35211 controls two independent output
voltages. Each voltage is controlled in an identical
fashion, so that the user can configure and optimize
each control loop individually. Unless otherwise
described, the following functions are performed on
the IR35211 on each control loop independently.
OPERATING MODES
The IR35211 can be used for Intel VR12/12.5, AMD
SVI1/SVI2, DDR Memory and GPU designs without
significant changes to the external components (Bill of
Materials). The required mode is selected in MTP and
the pin-out, VID table and relevant functions are
automatically configured. This greatly reduces time-to-
market and eliminates the need to manage and
inventory 6 different PWM controllers.
DIGITAL CONTROLLER & PWM
A linear Proportional-Integral-Derivative (PID) digital
controller provides the loop compensation for system
regulation. The digitized error voltage from the high-
speed voltage error ADC is processed by the digital
compensator. The digital PWM generator uses the
outputs of the PID and the phase current balance
control signals to determine the pulse width for each
phase on each loop. The PWM generator has enough
resolution to ensure that there are no limit cycles. The
compensator coefficients are user configurable to
enable optimized system response. The compen-
sation algorithm uses a PID with two additional
programmable poles. This provides the digital
equivalent of a Type III analog compensator.
ADAPTIVE TRANSIENT ALGORITHM (ATA)
Dynamic load step-up and load step-down transients
require fast system response to maintain the output
voltage within specification limits. This is achieved by
a unique adaptive non-linear digital transient control
loop based on a proprietary algorithm.
MULTIPLE TIME PROGRAMMING MEMORY
The multiple time programming memory (MTP) stores
the device configuration. At power-up, MTP contents
are transferred to operating registers for access
during device operation. MTP allows customization
during both design and high-volume manufacturing.
MTP integrity is verified by cyclic redundancy code
(CRC) checking on each power up. The controller will
not start in the event of a CRC error.
The IR35211 offers up to 8 writes to configure basic
device parameters such as frequency, fault operation
characteristics, and boot voltage. This represents a
significant size and component saving compared to
traditional analog methods. The following pseudo-
code illustrates how to write the MTP:
# write data
Set MTP Command Register = WRITE,
Line Pointer = An unused line
Poll MTP Command Register until Operation = IDLE.
# verify data was written correctly
Issue a READ Command; then poll OTP Operation Register
till Operation = IDLE
Verify that the Read Succeeded
INTERNAL OSCILLATOR
The IR35211 has a single 96MHz internal oscillator
that generates all the internal system clock
frequencies required for proper device function.
The oscillator frequency is factory trimmed for
precision and has extremely low jitter (Figure 4) even
in light-load mode (Figure 5). The single internal
oscillator is used to set the same switching frequency
on each loop.



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