IR35211 datasheet(34/58 Pages) IRF

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Dual Output Digital Multi-Phase Controller

IR35211

July 24, 2014 | V1.00

The PWM signals from the active phases of the

IR35211 are designed to operate with Active Tri-Level

(ATL) type, industry standard tri-state type drivers or

PowIRstage devices. ATL drivers are preferred

because they have a fast phase disable capability with

only a single control signal to the driver. The fast

disable capability of the IR ATL driver enables better

phase dropping and discontinuous mode performance

and can be used to enhance transient response when

used with the IR non-linear transient control. The user

selects tri-state type drivers with 1.8V PWM voltage

level (CHL85xx series) or 3.3V PWM level as shown

in Table 30. The logic operation for these two types of

tri-state drivers is depicted in Figure 23 and Figure 24.

The driver mode configuration is stored in the MTP.

In addition, the IR35211 provides the flexibility to

configure PWM levels to operate with external

MOSFET drivers or driver-MOSFET (PowIRstage)

devices that support +3.3V tri-state signaling. The

IR35211, when in 3.3V tri-state mode, floats the

outputs so that the voltage level is determined by an

external voltage divider which is typically inside the

driver MOSFET. Sometimes external resistors are

added to improve the speed of the PWM signal going

into tri-state.

Note that the PWM outputs are tri-stated whenever

the controller is disabled (EN = low), the shut-down

ramp has completed or before the soft-start ramp is

initiated.

TABLE 30: DRIVER LOGIC LEVEL SELECTION

Tri-level PWM Voltage

3.3V (Tri-state)

1.8V (Active Tri-Level)

Figure 23: 1.8V Active Tri-level (ATL) Logic Levels

Figure 24: 3.3V Tri-state Driver Logic Levels

OUTPUT VOLTAGE DIFFERENTIAL SENSING

The IR35211 VCPU and VRTN pins for each loop are

connected to the load sense pins of each output

voltage to provide true differential remote voltage

sensing with high common-mode rejection. Each loop

has a high bandwidth error amplifier that generates

the error voltage between this remote sense voltage

and the target voltage. The error voltage is digitized

by a fast, high-precision ADC.

As shown in Figure 25, the Vsen and Vrtn inputs have

a 2KΩ pull-up to an internal 1V rail. This causes some

current flow in the Vsen and Vrtn lines so external

impedance should be kept to a minimum to avoid

creating an offset in the sensed output voltage.

IR35211 Datasheet(PDF) 34 Page - International Rectifier

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