PCM1870 datasheet(3/52 Pages) TI2

3 / 52 page

www.ti.com

ELECTRICAL CHARACTERISTICS

PCM1870

SLAS544A – MAY 2007 – REVISED SEPTEMBER 2007

All specifications at TA = 25°C, VDD = VIO = VCC = VPA = 3.3 V, fS = 48 kHz, system clock = 256 fS, and 16-bit data, unless

otherwise noted

PCM1870RHF, PCM1870YZF

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

AUDIO DATA

Data Format

Resolution

Bits

Audio data interface format

I2S, left-, right-justified, DSP

Audio data bit length

Bits

Audio data format

MSB-first, 2s-complement

Sampling frequency

kHz

VDD < 2 V

System clock

MHz

VDD > 2 V

DIGITAL INPUT/OUTPUT

Logic family

CMOS compatible

VIH

0.7 VIO

Input logic level

VDC

VIL

0.3 VIO

IIH

VIN = 3.3 V

Input logic current

μA

IIL

VIN = 0 V

–10

VOH

IOH = –2 mA

0.75 VIO

Output logic level

VDC

VOL

IOL = 2 mA

0.25 VIO

LINE INPUT TO DIGITAL OUTPUT THROUGH ADC (AIN1L/R, AIN2L/R AND PGINL/R—ALC = OFF, PG1 = PG2 = PG3 = PG4 = 0 dB

Dynamic Performance

2.828

Vp-p

Full-scale input voltage

0 dB

Vrms

Dynamic range

EIAJ, A-weighted

SNR

Signal-to-noise ratio

EIAJ, A-weighted

Channel separation

THD+N

Total harmonic distortion + noise

–1 dB

0.009%

0.017%

Analog Input

Center voltage

0.5 VCC

AIN1L, AIN1R, AIN2L, and AIN2R

Input impedance

PGINL and PGINR, PG3 = PG4 = –12 dB

142

Ω

PGINL and PGINR, PG3 = PG4 = 30 dB

4.7

9.5

ANALOG OUTPUTS (AOL AND AOR)

Center voltage

0.5 VCC

Load resistance

Ω

Load capacitance

MICROPHONE BIAS—ALC = OFF, PG1 = PG2 = PG3 = PG4 = 0 dB

Bias voltage

0.75 VCC

Bias source current

Output noise

6.5

μV

Submit Documentation Feedback

Product Folder Link(s): PCM1870

PCM1870 Datasheet(PDF) 3 Page - Texas Instruments

PCM1870 Datasheet(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL