PCM1870 datasheet(44/52 Pages) TI2

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BOARD DESIGN AND LAYOUT CONSIDERATIONS

VCC, VDD, and VIO Pins

AGND and DGND Pins

AIN1L, AIN1R, AIN2L, and AIN2R Pins

AOL, AOR, PGINL, and PGINR Pins

VCOM Pin

BCK (Master Mode) and DOUT Pins

PCM1870

SLAS544A – MAY 2007 – REVISED SEPTEMBER 2007

The digital and analog power supply lines to the PCM1870 should be bypassed to the corresponding ground pins

with 0.1- to 4.7-

μF ceramic capacitors or electrolytic capacitors, placed as close to the pins as possible to

maximize the dynamic performance of ADC.

To maximize the dynamic performance of the PCM1870, the analog and digital grounds are not connected

internally. These grounds should have very low impedance to avoid digital noise feeding back into the analog

ground. So, they should be connected directly to each other under the part to reduce the potential of noise

problems.

AIN1L, AIN1R, AIN2L, and AIN2R are single-ended inputs. AIN1L and AIN1R can also be used as a monaural

differential input. The anti-aliasing low-pass filters are integrated on these inputs to remove the out-of-band noise

from the audio. If the performance of these filters is not good enough for an application, appropriate external

anti-aliasing filters are needed. The passive RC filter (100

Ω and 0.01 μF to 1 kΩ and 1000 pF) is used in

general. Any pins that are not used in an application should be left open. Do not select open pins through

When AIN1L, AIN1R, AIN2L, and AIN2R pins are used as microphone inputs with high gain, AOL and AOR may

have a large dc offset. It is recommended to locate a dc-blocking capacitor (1- to 10-

μF capacitor) between

AOL/AOR and PGINL/PGINR. If an application is not affected by dc offset, the PCM1870 does not need the

capacitors.

μF to 4.7-μF capacitor is recommended between VCOM and AGND to ensure low source impedance for the

ADC common voltage. This capacitor should be located as close as possible to the VCOM pin to reduce dynamic

errors on the ADC common voltage.

BCK in the master mode and DOUT have adequate load drive capability, but if the BCK and DOUT lines are

long, locating a buffer near the PCM1870 and minimizing load capacitance is recommended in order to minimize

crosstalk between digital and analog circuits, maximize the dynamic performance of the ADC, and reduce power

consumption.

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PCM1870 Datasheet(PDF) 44 Page - Texas Instruments