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PCF85263ATL/A Datasheet(PDF) 43 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 43 Page - NXP Semiconductors |
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43 / 100 page ![]() PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 43 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus Oscillator circuits suffer from jitter. In particular, ultra low-power oscillators like the one used in the PCF85263A are optimized for power and not jitter. By setting the LOWJ bit, the jitter performance can be improved at the cost of power consumption. 8.10.5 OSCD[1:0]: quartz oscillator drive control [1] Default value. The oscillator is designed to be used with quartz with a series resistance up to 100 k . This covers the typical range of 32.768 kHz quartz crystals. Series resistance is also referred to as: ESR, motional resistance, or RS. A low drive mode is available for low series resistance quartz. This reduces the current consumption. For very high series resistance quartz, there is a high drive mode. Current consumption increases substantially in this mode. 8.10.6 CL[1:0]: quartz oscillator load capacitance [1] Default value. CL refers to the load capacitance of the oscillator circuit and allows for a certain amount of package and PCB parasitic capacitance. When the oscillator circuit matches the CL parameter of the quartz, then the frequency offset is zero. The PCF85263A is designed to operate with quartz with CL values of 6.0 pF, 7.0 pF and 12.5 pF. 12.5 pF are generally the cheapest and most widely available, but also require the most power to drive. The circuit also operates with 9.0 pF quartz, however the offset calibration would be needed to compensate. If a 9.0 pF quartz is used, then it is recommended to set CL to 7.0 pF. Table 34. OSCD[1:0] bits - oscillator control register (address 25h) Bit Symbol Value Description 3 to 2 OSCD[1:0] oscillator drive bits 00[1] normal drive; RS(max): 100 k 01 low drive; RS(max): 60 k; reduced IDD 10, 11 high drive; RS(max): 500 k; increased IDD Table 35. CL[1:0] bits - oscillator control register (address 25h) Bit Symbol Value Description 1 to 0 CL[1:0] internal oscillator capacitor selection for quartz crystals with the corresponding load capacitance of CL: 00[1] 7.0 pF 01 6.0 pF 10 12.5 pF 11 12.5 pF |
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