PCF85263ATLSLASHA datasheet(52/100 Pages) NXP

52 / 100 page

PCF85263A

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Product data sheet

Rev. 4.1 — 27 November 2015

52 of 100

NXP Semiconductors

PCF85263A

Tiny RTC with alarm, battery switch-over, and I2C-bus

8.12.4.2

TS pin output mode; CLK

It is possible to output a clock frequency on the TS pin. Clock frequency is selected with

the COF[2:0] bits in the Function register (Section 8.13 on page 54). The output is

push-pull. No output is available when on VBAT. When on VBAT the output is Hi-Z.

8.12.4.3

TS pin disabled

When disabled the pin is Hi-Z and can be left floating.

8.12.5 TSIM: TS pin input type control

[1]

Default value.

In CMOS input mode (TSIM = 0), input is taken directly from the TS pin. The input is

conditioned by the setting of TSL. When operating on the battery voltage (VBAT), the input

is disabled and is allowed to float.

In mechanical switch detector mode (TSIM = 1), the TS pin is sampled at a rate of 16 Hz

for a period of 30.5

s. At the same time as the sample a pull-up resistor is activated to

detect an open pin or a pin shorted to VSS. The input is referenced to the internal power

supply. This mode operates when on VDD or VBAT. The pull-up resistor value can be

controlled by TSPULL bit in the Pin_IO register (see Section 8.12 on page 50).

8.12.5.1

TS pin input mode

There are two input types which are controlled by the TSIM bit. The TS input can be used

to generate a timestamp event by configuring the timestamp mode bits; TSR2M[2:0] and

TSR1M[1:0] bits in TSR_mode register (see Table 20 on page 30).

Also it is possible to use the TS pin to control counting of time. This is typically for use with

the stop-watch mode where an elapsed time counter function can be implemented. Using

the STOPM bit in the Function register (see Table 51 on page 54) it is possible to control

the STOP bit by the TS pin.

8.12.6 INTAPM[1:0]: INTA pin mode control

[1]

Default value.

Table 48.

TSIM bit - Pin_IO control register (address 27h)

Bit

Symbol

Value

Description

4TSIM

TS pin input mode

0[1]

CMOS input; reference to VDD; disabled when

on VBAT

mechanical switch mode; active pull-up

sampled at 16 Hz; operates on VDD and VBAT

Table 49.

INTAPM[1:0] bits - Pin_IO control register (address 27h)

Bit

Symbol

Value

Description

1 to 0

INTAPM[1:0]

INTA pin mode

00[1]

CLK output mode

battery mode indication

INTA output

Hi-Z

PCF85263ATL/A Datasheet(PDF) 52 Page - NXP Semiconductors

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