Electronic Components Datasheet Search
  English  ▼

X  

PCF85263ATL/A Datasheet(PDF) 63 Page - NXP Semiconductors

Part # PCF85263ATL/A
Description  Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus
PDF  100 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF85263ATL/A Datasheet(HTML) 63 Page - NXP Semiconductors

Back Button PCF85263ATL/A Datasheet HTML 59Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 60Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 61Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 62Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 63Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 64Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 65Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 66Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 67Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 63 / 100 page
background image
PCF85263A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 4.1 — 27 November 2015
63 of 100
NXP Semiconductors
PCF85263A
Tiny RTC with alarm, battery switch-over, and I2C-bus
9.
I2C-bus interface
The I2C-bus is for bidirectional, two-line communication between different ICs. The two
lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor. Data transfer may be initiated only
when the bus is not busy. Both data and clock lines remain HIGH when the bus is not
busy. The PCF85263A acts as a slave receiver when being written to and as a slave
transmitter when being read from.
Remark: When on VBAT power, the interface is not accessible.
9.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse, as changes in the data line at this time
are interpreted as STOP or START conditions.
Fig 33. I2C read and write protocol
Fig 34. I2C read and write signaling



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com