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PCF85263ATL/A Datasheet(PDF) 63 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 63 Page - NXP Semiconductors |
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63 / 100 page ![]() PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 63 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus 9. I2C-bus interface The I2C-bus is for bidirectional, two-line communication between different ICs. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. Both data and clock lines remain HIGH when the bus is not busy. The PCF85263A acts as a slave receiver when being written to and as a slave transmitter when being read from. Remark: When on VBAT power, the interface is not accessible. 9.1 Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse, as changes in the data line at this time are interpreted as STOP or START conditions. Fig 33. I2C read and write protocol Fig 34. I2C read and write signaling |
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