PCF85263ATLSLASHA datasheet(50/100 Pages) NXP

50 / 100 page

PCF85263A

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Product data sheet

Rev. 4.1 — 27 November 2015

50 of 100

NXP Semiconductors

PCF85263A

Tiny RTC with alarm, battery switch-over, and I2C-bus

When enabled, interrupts are triggered every time the battery switch circuit switches to

either battery or to VDD and even if the BSF is not cleared, an interrupt pulse can be

generated.

In addition, the INTA pin can be configured as a battery mode indicator

(INTAPM[1:0] = 00). See Section 8.12.6 on page 52. This mode differs from a general

interrupt signal in that it is only controlled by the current battery switch status.

See Section 8.9 on page 38 for interrupt control.

Remark: INTB pin is only active when the IC is operating from VDD.

8.12 Pin_IO register

This register is used to define the input and output modes of the IC.

8.12.1 CLKPM: CLK pin mode control

[1]

CLK pin is not available on all package types.

[2]

Default value.

Setting the CLKPM bit disables the CLK output and force the pin to drive out a logic 0.

Clearing this bit enables the pad to output the selected clock frequency (see bits COF[2:0]

in the Function register, see Table 51 on page 54).

8.12.2 TSPULL: TS pin pull-up resistor value

[1]

Default value.

Controls the pull-up resistor value used in the mechanical switch detector. For

applications where there is a large capacitance on the TS pin e.g. from a long connecting

cable to the mechanical switch, the pull-up resistor value can be halved to improve switch

detection.

Using the low-resistance value increases current consumption when the switch is closed

i.e. shorting to VSS.

Table 43.

Pin_IO- pin input output control register (address 27h) bit description

Bit

Symbol

CLKPM

TSPULL

TSL

TSIM

TSPM[1:0]

INTAPM[1:0]

Section

Section 8.12.1

Section 8.12.2

Section 8.12.3

Section 8.12.5

Section 8.12.4

Section 8.12.6

Table 44.

CLKPM bit - Pin_IO control register (address 27h)

Bit

Symbol

Value

Description

7CLKPM[1]

CLK pin mode

0[2]

enable CLK pin

disable CLK pin

Table 45.

TSPULL bit - Pin_IO control register (address 27h)

Bit

Symbol

Value

Description

TSPULL

TS pin pull-up resistor value

0[1]

80 k



140 k



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