Not Recommended for New Designs

CDC706

www.ti.com...................................................................................................................................... SCAS829B – SEPTEMBER 2006 – REVISED FEBRUARY 2008

Byte 19 to 24, Bit [3]: Output Y0-Y5 Enable or Low-State

ENDISYx

Output Yx

Default (1)

0

Disable to low

1

Enable

Yes

(1)

Unless customer specific setting.

Byte 19 to 24, Bit [6]: Output Y0-Y5 Non-Inverting/Inverting

INVYx

Output Yx Status

Default (1)

0

Non-inverting

Yes

1

Inverting

(1)

Unless customer specific setting.

Byte 25, Bit [3:0]: SSC Modulation Frequency Selection in the Range of 30 kHz 60 kHz (1)

fvco (MHz)

Modulation

FSSC3

FSSC2

FSSC1

FSSC0

Default (2)

Factor

100

110

120

130

140

150

160

167

0

0

0

0

5680

17.6

19.4

21.1

22.9

24.6

26.4

28.2

29.4

0

0

0

1

5412

18.5

20.3

22.2

24.0

25.9

27.7

29.6

30.9

0

0

1

0

5144

19.4

21.4

23.3

25.3

27.2

29.2

31.1

32.5

0

0

1

1

4876

20.5

22.6

24.6

26.7

28.7

30.8

32.8

34.2

0

1

0

0

4608

21.7

23.9

26.0

28.2

30.4

32.6

34.7

36.2

0

1

0

1

4340

23.0

25.3

27.6

30.0

32.3

34.6

36.9

38.5

0

1

1

0

4072

24.6

27.0

29.5

31.9

34.4

36.8

39.3

41.0

0

1

1

1

3804

26.3

28.9

31.5

34.2

36.8

39.4

42.1

43.9

fmod

[kHz]

1

0

0

0

3536

28.3

31.1

33.9

36.8

39.6

42.4

45.2

47.2

1

0

0

1

3286

30.4

33.5

36.5

39.6

42.6

45.6

48.7

50.8

Yes

1

0

1

0

3000

33.3

36.7

40.0

43.3

46.7

50.0

53.3

55.7

1

0

1

1

2732

36.6

40.3

43.9

47.6

51.2

54.9

58.6

61.1

1

1

0

0

2464

40.6

44.6

48.7

52.8

56.8

60.9

64.9

67.8

1

1

0

1

2196

45.5

50.1

54.6

59.2

63.8

68.3

72.9

76.0

1

1

1

0

1928

51.9

57.1

62.2

67.4

72.6

77.8

83.0

86.6

1

1

1

1

1660

60.2

66.3

72.3

78.3

84.3

90.4

96.4

100.6

(1)

The PLL has to be bypassed (turned off) when changing SSC Modulation Frequency Factor on-the-fly. This can be done by following

programming sequence: bypass PLL2 (Byte 3, Bit 6 = 1); write new Modulation Factor (Byte 25); re-activate PLL2 (Byte 3, Bit 6 = 0).

(2)

Unless customer specific setting.

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