Electronic Components Datasheet Search
  English  ▼

X  

CDC706 Datasheet(PDF) 20 Page - Texas Instruments

Part # CDC706
Description  PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CDC706 Datasheet(HTML) 20 Page - Texas Instruments

Back Button CDC706 Datasheet HTML 16Page - Texas Instruments CDC706 Datasheet HTML 17Page - Texas Instruments CDC706 Datasheet HTML 18Page - Texas Instruments CDC706 Datasheet HTML 19Page - Texas Instruments CDC706 Datasheet HTML 20Page - Texas Instruments CDC706 Datasheet HTML 21Page - Texas Instruments CDC706 Datasheet HTML 22Page - Texas Instruments CDC706 Datasheet HTML 23Page - Texas Instruments CDC706 Datasheet HTML 24Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 44 page
background image
Not Recommended for New Designs
CDC706
SCAS829B – SEPTEMBER 2006 – REVISED FEBRUARY 2008...................................................................................................................................... www.ti.com
Byte 25, Bit [6:4]: SSC Modulation Amount (1)
SSC2
SSC1
SSC0
Function
Default (2)
0
0
0
SSC Modulation Amount 0% = SSC bypass for PLL(3)
Yes
0
0
1
SSC Modulation Amount ±0.1% (center spread)
0
1
0
SSC Modulation Amount ±0.25% (center spread)
0
1
1
SSC Modulation Amount ±0.4% (center spread)
1
0
0
SSC Modulation Amount 1% (down spread)
1
0
1
SSC Modulation Amount 1.5% (down spread)
1
1
0
SSC Modulation Amount 2% (down spread)
1
1
1
SSC Modulation Amount 3% (down spread)
(1)
The PLL has to be bypassed (turned off) when changing SSC Modulation Amount on-the-fly. This can be done by following
programming sequence: bypass PLL2 (Byte 3, Bit 6 = 1); write new Modulation Amount (Byte 25); re-activate PLL2 (Byte 3, Bit 6 = 0).
(2)
Unless customer specific setting.
(3)
If SSC bypass is selected, SSC circuitry of PLL2 is powered-down and the SSC output is reset to logic low. The non-SSC output of
PLL2 is not affected by this mode and can still be used.
Byte 26, Bit [6:0]: Byte Count (1)
BC6
BC5
BC4
BC3
BC2
BC1
BC0
No. of Bytes
Default (2)
0
0
0
0
0
0
0
Not allowed
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
2
0
0
0
0
0
1
1
3
•
•
•
0
0
1
1
0
1
1
27
Yes
•
•
•
1
1
1
1
1
0
1
125
1
1
1
1
1
1
0
126
1
1
1
1
1
1
1
127
(1)
Defines the number of Bytes, which will be sent from this device at the next Block Read protocol.
(2)
Unless customer specific setting.
20
Submit Documentation Feedback
Copyright © 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): CDC706



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com