ADS9217 datasheet(27/68 Pages) TI2

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7.3.8.4 Test Patterns for Data Interface

The ADS911x features test patterns (Figure 7-10) used by the host for debugging and verifying the data

interface. The test patterns replace the ADC output data with predefined digital data. Enable the test patterns by

configuring the corresponding register addresses 0x13 through 0x16 in bank 1.

Table 7-9 lists the test patterns supported by the ADS911x.

TP0

TP1

LSB

MSB

LSB

TP1

MSB

Bit 15

Bit 0

Bit 8

Bit 7

Address

0x14

0x15

0x16

Test Patterns for

ADC

Fixed Pattern {TP0}

Digital ramp

Alternating {TP0, TP1}

ADC Test Pattern Control Register

0x13

Figure 7-10. Register Bank for Test Patterns

Table 7-9. Test Pattern Configurations

ADC OUTPUT

TP_EN

TP_MODE

SECTION

RESULT

ADC conversion result

Fixed pattern

0 or 1

Fixed Pattern

ADC output = TP0

Digital ramp

Digital Ramp

ADC output = Digital ramp

Alternating test patterns

Alternating Test Pattern

ADC output = TP0, TP1

7.3.8.4.1 Fixed Pattern

The ADC outputs fixed patterns defined in the TP0 register in place of the ADC data.

• Configure the test patterns in TP0

• Set TP_EN = 1 and TP_MODE = 0 (address = 0x13)

7.3.8.4.2 Alternating Test Pattern

The ADC outputs alternating test patterns defined in the TP0 and TP1 registers in place of the ADC data.

• Configure the test patterns in TP0 and TP1

• Set TP_EN = 1 and TP_MODE = 3 (address = 0x13)

7.3.8.4.3 Digital Ramp

The ADC outputs digital ramp values with increments specified in the RAMP_INC register in place of the ADC

data.

• Configure the increment value between two successive steps of the digital ramp in the RAMP_INC (address

= 0x13) register. The digital ramp increments by N + 1, where N is the value configured in the RAMP_INC

• Set TP_EN = 1 and TP_MODE = 2 (address = 0x13).

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