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ADS9217 Datasheet(PDF) 45 Page - Texas Instruments |
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ADS9217 Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 68 page ![]() 8.2.14 Register C1h (offset = C1h) [reset = 0h] Figure 8-39. Register C1h 15 14 13 12 11 10 9 8 RESERVED PD_REF RESERVED DATA_RATE R/W-0h R/W-0h R/W-0h R/W-0h 7 6 5 4 3 2 1 0 RESERVED CLK2 R/W-0h R/W-0h Figure 8-40. Register C1h Field Descriptions Bit Field Type Reset Description 15-12 RESERVED R/W 0h Reserved. Do not change from the default reset value. 11 PD_REF R/W 0h ADC reference voltage source selection. 0 : Internal reference enabled. 1 : Internal reference disabled. Connect the external reference voltage to the REFIO pin. 10-9 RESERVED R/W 0h Reserved. Do not change from the default reset value. 8 DATA_RATE R/W 0h Select data rate for the data interface. 0 : Double data rate (DDR) 1 : Single data rate (SDR) 7-1 RESERVED R/W 0h Reserved. Do not change from the default reset value. 0 CLK2 R/W 0h Select data rate for the data interface. 0 : Configuration for DATA_LANES = 2 or 7 8.2.15 Register C4h (offset = C4h) [reset = 0h] Figure 8-41. Register C4h 15 14 13 12 11 10 9 8 RESERVED R/W-0h 7 6 5 4 3 2 1 0 RESERVED OSR_INIT2 RESERVED OSR_INIT3 PD_CHIP R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h Figure 8-42. Register C4h Field Descriptions Bit Field Type Reset Description 15-6 RESERVED R/W 0h Reserved. Do not change from the default reset value. 5-4 OSR_INIT2 R/W 0h Initialization for data averaging. 0 : Configuration for disabling data averaging 2 : Configuration for enabling data averaging 3-2 RESERVED R/W 0h Reserved. Do not change from the default reset value. 1 OSR_INIT3 R/W 0h Initialization for data averaging. 0 : Configuration for disabling data averaging 1 : Configuration for enabling data averaging 0 PD_CHIP R/W 0h Full chip power-down control. 0 : Normal device operation 1 : Full device powered down www.ti.com ADS9117, ADS9118, ADS9119 SLVSIN3 – MAY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links: ADS9117 ADS9118 ADS9119 |
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