ADS9217 datasheet(47/68 Pages) TI2

47 / 68 page

8.2.17 Register FBh (offset = FBh) [reset = 0h]

Figure 8-45. Register FBh

RESERVED

R/W-0h

RESERVED

NCO_SYSREF

XOR_MODE

CLK5

MIXER_EN

R/W-0h

Figure 8-46. Register FBh Field Descriptions

Bit

Field

Type

Reset

Description

15-4

RESERVED

R/W

Reserved. Do not change from the default reset value.

NCO_SYSREF

R/W

Set to 1b when applying periodic pulses on the

SMPL_SYNC pin.

0: Synchronize the NCO with one pulse on the

SMPL_SYNC pin.

1: Synchronize the NCO with the first pulse on the

SMPL_SYNC pin when using periodic pulses.

XOR_MODE

R/W

Selects the bit with which the ADC output data is XORed

when XOR output mode is enabled.

0 : The PRBS bit is output after the ADC LSB. ADC output

data are XORed with the PRBS bit.

1 : ADC output data are XORed with the LSB of the

conversion result.

CLK5

R/W

Clock configuration for the ADS9119 and ADS9118. See

the Data Interface section for details. Not applicable for the

ADS9117.

0 : 24-bit SDR and DDR modes

1 : Not recommended

MIXER_EN

R/W

0: Digital down converter disabled

1: Digital down converter enabled

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ADS9117, ADS9118, ADS9119

SLVSIN3 – MAY 2025

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ADS9217 Datasheet(PDF) 47 Page - Texas Instruments

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