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CDCM6208 Datasheet(PDF) 46 Page - Texas Instruments

Part # CDCM6208
Description  CDCM6208 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
PDF  94 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CDCM6208 Datasheet(HTML) 46 Page - Texas Instruments

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5
4
3
2
Reg05
Register Number (s)
Bit Number(s)
R05 .2
Device
Control
And
Status
STATUS0
STATUS1/PIN0
PDN
RESETN/PWR
SCL/PIN4
SDI/SDA/PIN1
SDO/AD0/PIN2
SCS/AD1/PIN3
SI_MODE0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg 0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg1
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg2
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg3
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg 20
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg 21
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg 22
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg 23
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg30
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reg31
REGISTER SPACE
Device
Hardware
SPI/I2C
Port
Control/
Status Pins
SPI: SI_MODE[1:0]=00;
I2C: SI_MODE[1:0]=01;
Pin Mode: SI_MODE[1:0]=10
SI_MODE1
Comm
Select
46
CDCM6208
SCAS931G – MAY 2012 – REVISED JANUARY 2018
www.ti.com
Product Folder Links: CDCM6208
Submit Documentation Feedback
Copyright © 2012–2018, Texas Instruments Incorporated
8.4.5 Interface and Control
The host (DSP, Microcontroller, FPGA, etc) configures and monitors the CDCM6208 through the SPI or I2C port.
The host reads and writes to a collection of control/status bits called the register file. Typically, a hardware block
is controlled and monitored via a specific grouping of bits located within the register file. The host controls and
monitors certain device-wide critical parameters directly, through control/status pins. In the absence of a host, the
CDCM6208 can be configured to operate in pin mode where the control pins [PIN0-PIN4] can be set
appropriately to generate the necessary clock outputs out of the device.
Figure 38. CDCM6208 Interface and Control Block
Within this register space, there are certain bits that have read/write access. Other bits are read-only (an attempt
to write to a read only bit will not change the state of the bit).
8.4.5.1 Register File Reference Convention
Figure 39 shows the method this document employs to refer to an individual register bit or a grouping of register
bits. If a drawing or text references an individual bit, the format is to specify the register number first and the bit
number second. The CDCM6208 contains 21 registers that are 16 bits wide. The register addresses and the bit
positions both begin with the number zero (0). A period separates the register address and bit address. The first
bit in the register file is address 'R0.0' meaning that it is located in Register 0 and is bit position 0. The last bit in
the register file is address R31.15 referring to the 16thbit of register address 31 (the 32ndregister in the device
Figure 39. CDCM6208 Register Reference Format



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