DRV10975ZPWPR datasheet(29/66 Pages) TI2

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Speed

Command

Analog Input

Maximum

Speed

Command

ANA-ZS

ANA-FS

Adjustment (half cycle)

Zero cross signal

Adjustment (full cycle)

Zero cross signal

Estimated Position

Real Driving Voltage

Real Position

Ideal Driving Voltage

Estimated Position

Real Driving Voltage

Real Position

Ideal Driving Voltage

DRV10975, DRV10975Z

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SLVSCP2F – JANUARY 2015 – REVISED JUNE 2020

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8.4.5.1 Half Cycle Control and Full Cycle Control

The estimated BEMF used to control the drive state of the motor has two zero-crosses every electrical cycle. The

DRV10975 can be configured to update the drive state either once every electrical cycle or twice for every

electrical cycle. When AdjMode is programmed to 1, half cycle adjustment is applied. The control logic is

triggered at both rising edge and falling edge. When AdjMode is programmed to 0, full cycle adjustment is

applied. The control logic is triggered only at the rising edge (see Figure 21).

Half cycle adjustment provides a faster response when compared with full cycle adjustment. Use half cycle

adjustment whenever the application requires operation over large dynamic loading conditions. Use the full cycle

adjustment for low current (<1 A) applications because it offers more tolerance for current measurement offset

errors.

Figure 21. Closed Loop Control Commutation Adjustment Mode

8.4.5.2 Analog Mode Speed Control

The SPEED input pin can be configured to operate as an analog input (SpdCtrlMd = 0).

When configured for analog mode, the voltage range on the SPEED pin can be varied from 0 to V3P3. If

SPEED > VANA_FS, the speed command is maximum. If VANA_ZS ≤ SPEED < VANA_FS the speed command

changes linearly according to the magnitude of the voltage applied at the SPEED pin. If SPEED < VANA_ZS the

speed command is to stop the motor. Figure 22 shows the speed command when operating in analog mode.

Figure 22. Analog Mode Speed Command

8.4.5.3 Digital PWM Input Mode Speed Control

If SpdCtrlMd = 1, the SPEED input pin is configured to operate as a PWM-encoded digital input. The PWM duty

cycle applied to the SPEED pin can be varied from 0 to 100%. The speed command is proportional to the PWM

input duty cycle. The speed command stops the motor when the PWM input keeps at 0 for tEN_SL_PWM (see

Figure 23).

The frequency of the PWM input signal applied to the SPEED pin is defined as ƒPWM. This is the frequency the

device can accept to control motor speed. It does not correspond to the PWM output frequency that is applied to

the motor phase. The PWM output frequency can be configured to be either 25 kHz when the DoubleFreq bit is

set to 0 or to 50 kHz when DoubleFreq bit is set to 1.

DRV10975ZPWPR Datasheet(PDF) 29 Page - Texas Instruments

DRV10975ZPWPR Datasheet(HTML) 29 Page - Texas Instruments

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