DRV10975ZPWPR datasheet(30/66 Pages) TI2

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Buffer of

SpdCtrl[8]

SpdCtrl [7:0]

Write to

SpeedCtrl2

Write to

SpeedCtrl1

Speed Command

Speed

Command

PWM duty

Maximum

Speed

Command

100%

DRV10975, DRV10975Z

SLVSCP2F – JANUARY 2015 – REVISED JUNE 2020

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Figure 23. PWM Mode Speed Command

8.4.5.4 I2C Mode Speed Control

The DRV10975 can also command the speed through the I2C serial interface. To enable this feature, the

OverRide bit is set to 1. When the DRV10975 is configured to operate in I2C mode, it ignores the signal applied

to the SPEED pin.

The speed command can be set by writing the SpdCtrl[8] and SpdCtrl[7:0] bits. The 9-bit SpdCtrl [8:0] located in

the SpeedCtrl1 and SpeedCntrl2 registers are used to set the peak amplitude voltage applied to the motor. The

maximum speed command is set when SpdCtrl [8:0] is set to 0x1FF (511).

When SpdCtrl [8] is written to the SpeedCtrl2 register, the data is stored, but the output is not changed. When

SpdCtrl [7:0] is written to the SpeedCtrl1 register, the speed command is updated (see Figure 24).

Figure 24. I2C Mode Speed Control

8.4.5.5 Closed Loop Accelerate

To prevent sudden changes in the torque applied to the motor which could result in acoustic noise, the

DRV10975 provides the option of limiting the maximum rate at which the speed command changes.

ClsLpAccel[2:0] can be programmed to set the maximum rate at which the speed command changes (shown in

Figure 25).

DRV10975ZPWPR Datasheet(PDF) 30 Page - Texas Instruments