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L9965P Datasheet(PDF) 81 Page - STMicroelectronics |
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L9965P Datasheet(HTML) 81 Page - STMicroelectronics |
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81 / 104 page  Table 84. NVM_OP_CMD - 0x031 Field name Type Bit offset Bit width Reset value Reset sources Description UNUSED RO 6 4 0x0 nPOR_MAIN NVM_ERASE_VERIFY_ERROR CR 5 1 0x0 nPOR_MAIN 1 = Error during NVM erasing NVM_PROGRAM_VERIFY_ERROR CR 4 1 0x0 nPOR_MAIN 1 = Error during NVM programming NVM_BUSY RO 3 1 0x0 nPOR_MAIN 1 = NVM busy NVM_OPERATION WO 0 3 0x0 nPOR_MAIN 0x3 = Upload client NVM sect and download all NVM 0x5 = Download all NVM Table 85. HS_CMD - 0x32 Field name Type Bit offset Bit width Reset value Reset sources Description ARM_HS_SPI WO 0 10 0x0 nPOR_MAIN 0x155 = High Side SPI arming command Table 86. LS_CMD - 0x33 Field name Type Bit offset Bit width Reset value Reset sources Description ARM_LS_SPI WO 0 10 0x0 nPOR_MAIN 0x2AA = Low Side SPI arming command 3.15 Configuration Lock To prevent inadvertent modification of safety relevant registers (SRR) and safety latent registers (SLR), written in bold in this document, such register map sectors are protected by a lock field. By default, SRR/SLR registers are locked. To configure the device, the following procedure shall be implemented: 1. MCU writes 0x55 in the SPECIAL_KEY register to enter in partial unlock. 2. MCU writes 0x33 in the SPECIAL_KEY register to confirm the full unlock. 3. MCU changes any configuration register within tCFG_TIMEOUT. 4. MCU reapplies the lock writing 0xAA in the SPECIAL_KEY. If the tCFG_TIMEOUT expires, the lock is automatically reapplied. Trying to write a protected register (SRR or SLR) without unlocking will result in the data being discarded. Note: • Writing lock-protected registers only alters the current configuration loaded in the SPI registers. To save the configuration and guarantee a correct reload at each power-up, the update has to be pushed into the non-volatile memory (NVM), as described in the dedicated section. • For temporary modifications to the IC configuration, which do not need to be pushed in the non-volatile memory, it is recommended to disable the configuration integrity check (CONF_CRC). 3.15.1 Configuration lock electrical parameters All parameters are tested and guaranteed in the following conditions, unless otherwise noted: all supplies according to the Table 3; TJ according to the Table 2. Table 87. Configuration Lock electrical parameters Symbol Parameter Test condition Min Typ Max Unit tCFG_TIMEOUT Configuration lock timeout Tested in SCAN 1.8 2 2.1 s L9965P Functional description DS14702 - Rev 4 page 81/104 |
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