L9965P datasheet(26/104 Pages) STMICROELECTRONICS

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3.6.1

Signal stage (FENH/FENL/SPI)

The IC has two digital inputs, FENH and FENL, whose signals are treated by two different decoders to generate

the driving stimulus for the HS and LS switches.

Additionally, the switches can be triggered by dedicated SPI commands.

The FENH/FENL/SPI decoders are only available in DIAG, NORMAL and ARM states, while in DEEP-SLEEP

they are disabled, since FENH/FENL/SPI may only be used as wake-up sources.

3.6.1.1

FENH/FENL decoders configuration

The two decoders can be individually enabled by setting FENH_EN = 1 and FENL_EN = 1. When disabled, their

output is always in the inactive state (no trigger).

Before being input to the digital decoders, the FENH/FENL inputs are always pre-filtered by an analog stage

(tFENx_FLT) to prevent noise from altering the decoding process.

Each decoder can be configured in different modes:

•

FENH_MODE/FENL_MODE = 0 sets the level-based decoding

–

A programmable deglitch filter tFENx_DEGLITCH helps to filter out unwanted spikes on the trigger

inputs. The deglitch value is valid for both FENH and FENL inputs.

–

When the FENL/FENH deglitched signal holds the active level, an arming condition is acknowledged

on the corresponding branch.

•

FENH_MODE/FENL_MODE = 1 sets the PWM-based decoding. The PWM-based encoding allows the

L9965P continuously monitoring the status of the trigger lines, being capable of detecting frequency drifts

and stuck-at faults in real-time, as described in the Section 3.6.1.2: FENH/FENL integrity check.

The decoder frequency can be selected between two options:

–

FENH_FREQ/FENL_FREQ = 0 sets the 125 kHz option

–

FENH_FREQ/FENL_FREQ = 1 sets the 16 kHz option

The programmable NFENx_FAULT_PERIOD up/down counter is used to deglitch the PWM periods. The

counter value is valid for both FENH and FENL inputs. The counter output behaves as follows:

–

In case it reaches the programmed threshold, it saturates and an arming condition is acknowledged

on the corresponding branch.

–

In case the output value is less than the programmed threshold, the arming is released.

The FENH/FENL active state is configured through FENH_LEVEL/FENL_LEVEL bits:

•

FENH_LEVEL = FENL_LEVEL = 0 sets the active state to:

–

Low level in case of level-based decoding (FENx_MODE = 0)

–

tON_FAULT_0L low on-time in case of PWM-based decoding (FENx_MODE = 1) and high frequency

selected (FENx_FREQ = 0)

–

tON_FAULT_1L low on-time in case of PWM-based decoding (FENx_MODE = 1) and low frequency

selected (FENx_FREQ = 1)

•

FENH_LEVEL = FENL_LEVEL = 1 sets the active state to:

–

High level in case of level-based decoding (FENx_MODE = 0)

–

tON_FAULT_0H high on-time in case of PWM-based decoding (FENx_MODE = 1) and high frequency

selected (FENx_FREQ = 0)

–

tON_FAULT_1H high on-time in case of PWM-based (FENx_MODE = 1) decoding and low frequency

selected (FENx_FREQ = 1)

Note:

To be robust against common cause failures, it is recommended to apply complementary active states to FENH

and FENL.

Having selected the active states, the FENH/FENL internal pull-up/pull-down resistors can be programmed

accordingly to manage the Hi-Z input condition:

•

FENH_PU_PD/FENL_PU_PD = 0 enables the internal pull-up to the 3.3 V internal regulator.

•

FENH_PU_PD/FENL_PU_PD = 1 enables the internal pull-down to GND.

Note:

To prevent inadvertent trigger generation in case of pin loss, it is recommended to select the internal pull-up/pull-

down configuration which leads the input signal to the inactive state in case of FENH/FENL pin loss.

The decoder output normally holds the inactive level. The block generates an active output level (delayed if delay

is set) whenever the switches need to be turned ON in response to a valid trigger detected on FENH/FENL.

L9965P

Functional description

DS14702 - Rev 4

page 26/104

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