 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
L9965P Datasheet(PDF) 32 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9965P Datasheet(HTML) 32 Page - STMicroelectronics |
|
|
32 / 104 page  3.6.1.5 FENH/FENL diagnostics Table 20. FENH/FENL diagnostics Fault type Assertion condition IC reaction to assertion Release condition IC reaction to flag clear Maskable FENx high frequency When in PWM mode (FENx_MODE = 1) if the input signal period becomes lower than high threshold the high frequency fault is acknowledged The FENx_HIGH_FREQ flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is decremented by 1 If the input signal period becomes lower than high threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_HIGH_FREQ flag can always be cleared by the MCU. FENX_HIGH_FREQ_FAULTN_MSK masks fault redirection on FAULTN pin FENx low frequency When in PWM mode (FENx_MODE = 1) if the input signal period is between low and timeout thresholds the low frequency fault is acknowledged The FENx_LOW_FREQ flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is decremented by 1 If the input signal period becomes higher than low threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_LOW_FREQ flag can always be cleared by the MCU. FENX_LOW_FREQ_FAULTN_MSK masks fault redirection on FAULTN pin FENx timeout in PWM mode When in PWM mode (FENx_MODE = 1) if the input signal period becomes lower than timeout threshold the PWM timeout fault is acknowledged The FENx_PWM_TIMEOUT flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is reset (but not stopped) If the input signal period becomes higher than timeout threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_PWM_TIMEOUT flag can always be cleared by MCU. FENX_TIMEOUT_FAULTN_MSK masks fault redirection on FAULTN pin FENx timeout in level mode When in Level mode (FENx_MODE = 0), following a FAULTN pulse, the FENx input signal is expected to exhibit two edges within tFENx_TIMEOUT. If this does not happen, the level timeout fault is acknowledged The FENx_LEV_TIMEOUT flag is set FAULTN line is asserted The fault flag can always be cleared by the MCU FAULTN line is released FENx_MODE = 1 masks diagnostic execution. When disabled, the FENx_LEV_TIMEOUT flag can always be cleared by MCU. FENx_INT_CHECK_EN = 0 masks diagnostic execution. When disabled, the FENx_LEV_TIMEOUT flag can always be cleared by MCU. FENX_TIMEOUT_FAULTN_MSK masks fault redirection on FAULTN pin L9965P Functional description DS14702 - Rev 4 page 32/104 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
