L9965P datasheet(22/104 Pages) STMICROELECTRONICS

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3.5

Fault notification (FAULTN)

Detected faults are reported via SPI by the FAULTN_ECHO bit of the GSW. The FAULTN_ECHO bit being set to

‘1’ indicates the IC has not detected a failure.

Additionally, the fault status can also be reported by the FAULTN output, which can be disabled by setting

FAULTN_DIS = 1 in NVM.

Whenever a fault condition is detected, the open-drain FAULTN output is asserted low. The output is released

when every latched fault has been cleared.

Depending on the IC configuration, some diagnostics can be masked and their redirection onto FAULTN line can

also be masked. Refer to the diagnostic tables for the specific masking conditions.

Whenever a fault is asserted and the CWUP input level is low, the tFAULT_HANDLING_TIMEOUT is released and runs

in background. The timeout is reset by the CWUP high level: if the host controller does not raise CWUP before

the timeout expires, the IC moves back to DEEP-SLEEP. If a fault occurs when the CWUP input level is high and

it is still present when the CWUP input level is set low, the tFAULT_HANDLING_TIMEOUT does not start.

3.5.1

FAULTN integrity check

To enable reaching the ASIL targets at system level, the IC provides a means to periodically verify the integrity of

the FAULTN line. Depending on the power management strategy, different configurations may apply, as reported

in the Table 17.

Table 17. FAULTN configuration according to different power management strategies

Power

management

strategy

L9965C

state

L9965P

state

CWUP

FAULTN

Configuration

Note

Full power

NORMAL

Static high

Pulse

generation

every

tFAULTN_PERIOD

FAULTN_DIS = 0

FAULTN_CYCLIC_PULSE =

The FAULTN path is

continuously

checked, allowing

quick detection of line

stuck failures

Full power

NORMAL

Static high

Level mode

FAULTN_DIS = 0

FAULTN_CYCLIC_PULSE =

The FAULTN output

integrity can only be

verified manually

using the

FAULTN_FORCE

command

Low power

NORMAL

CYCLIC

WAKEUP

(alternation

between

DEEP-

SLEEP and

DIAG)

Cyclic high

pulse

generated

by L9965C

or MCU

Pulse

generation

every

tCWUP_PERIOD

FAULTN_DIS = 0

FAULTN_CYCLIC_PULSE =

The FAULTN path is

checked at each

cyclic wake-up event:

FAULTN low pulses

are synchronized to

received CWUP

pulses

FAULTN_FORCE should be used only with FAULTN_CYCLIC_PULSE = 0. If used with

FAULTN_CYCLIC_PULSE = 1, it is a fault injection.

When enabled, the integrity check can be executed:

•

Continuously in full power mode (refer to the Figure 6)

–

This diagnostic requires FAULTN_CYCLIC_PULSE = 1. Pulse generation starts tFAULTN_PERIOD after

such a bit is written high (see the Figure 7).

–

If a failure occurs and FAULTN is held active low for fault signaling, the tFAULTN_PERIOD timer is kept

under reset. It restarts once all faults have been cleared and FAULTN returns to its inactive high

state.

L9965P

Functional description

DS14702 - Rev 4

page 22/104

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