5.49 k

VCM

10 V

+15 V

VOUT

1 V

±15 V

RS+

1 k

C1

C2

RG

INA

RG

RS±

0.99 k

VDIFF = VOUT / G

24

INA818

SBOS894A – APRIL 2019 – REVISED JUNE 2019

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8.3.5 Operating Voltage

The INA818 operates over a power-supply range of 4.5 V to 36 V (±2.25 V to ±18 V).

CAUTION

Supply voltages higher than 40 V (±20 V) can permanently damage the device.

Parameters that vary over supply voltage or temperature are shown in Typical

Characteristics .

8.3.6 Error Sources

Most modern signal-conditioning systems calibrate errors at room temperature. However, calibration of errors

that result from a change in temperature is normally difficult and costly. Therefore, minimize these errors by

choosing high-precision components, such as the INA818, that have improved specifications in critical areas that

impact the precision of the overall system. Figure 64 shows an example application.

Figure 64. Example Application With G = 10 V/V and 1-V Output Voltage

Resistor-adjustable devices (such as the INA818) show the lowest gain error in G = 1 because of the inherently

well-matched drift of the internal resistors of the differential amplifier. At gains greater than 1 (for instance, G =

10 V/V or G = 100 V/V), the gain error becomes a significant error source because of the contribution of the

resistor drift of the 25-kΩ feedback resistors in conjunction with the external gain resistor. Except for very high

gain applications, the gain drift is by far the largest error contributor compared to other drift errors, such as offset

drift.

The INA818 offers excellent gain error over temperature for both G > 1 and G = 1 (no external gain resistor).

Table 5 summarizes the major error sources in common INA applications and compares the three cases of G = 1

(no external resistor) and G = 10 (5.49-kΩ external resistor) and G = 100 (511-Ω external resistor). All

calculations are assuming an output voltage of VOUT = 1 V. Thus, the input signal VDIFF (given by VDIFF= VOUT /

G) exhibits smaller and smaller amplitudes with increasing gain G. VDIFF = 1 mV at G = 1000 in this example. All

calculations refer the error to the input for easy comparison and system evaluation. As Table 5 shows, errors

generated by the input stage (such as input offset voltage) are more dominant at higher gain, while the effects of

output stage are suppressed because they are divided by the gain when referring them back to the input. The

gain error and gain drift error are much more significant for gains greater than 1 because of the contribution of

the resistor drift of the 25-kΩ feedback resistors in conjunction with the external gain resistor. In most

applications, static errors (absolute accuracy errors) can readily be removed during calibration in production,

while the drift errors are the key factors limiting overall system performance.