TLV6713 datasheet(9/28 Pages) TI2

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Time (50 µs/div)

OUTB (2 V/div)

OUTA (2 V/div)

VDD (2 V/div)

Startup

Delay

Period

TJ (qC)

-40

-20

100

120

140

120

135

150

165

180

195

210

D025

Time (50 µs/div)

OUTB (2 V/div)

OUTA (2 V/div)

VDD (2 V/div)

Startup

Delay

Period

IOUT (mA)

0.1

0.2

0.3

0.4

0.5

0.6

D009

TJ = -40qC

TJ = 0qC

TJ = 25qC

TJ = 85qC

TJ = 125qC

IOUT (mA)

0.1

0.2

0.3

0.4

0.5

D010

TJ = -40qC

TJ = 0qC

TJ = 25qC

TJ = 85qC

TJ = 125qC

TLV6710

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SNVSAV4B – JANUARY 2018 – REVISED OCTOBER 2018

Product Folder Links: TLV6710

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Typical Characteristics (continued)

At TJ = 25°C and VDD = 12 V, unless otherwise noted.

VDD = 1.8 V

Figure 14. Output Voltage Low vs Output Sink Current

VDD = 12 V

Figure 15. Output Voltage Low vs Output Sink Current

VDD = 5 V

Figure 16. Start-Up Delay vs Temperature

VDD = 5 V, VINA = 390 mV, VINB = 410 mV, VPULLUP = 3.3 V

Figure 17. Start-Up Delay

VDD = 5 V, VINA = 410 mV, VINB = 390 mV, VPULLUP = 3.3 V

Figure 18. Start-Up Delay

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