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MPQ7920 Datasheet(PDF) 21 Page - Monolithic Power Systems

Part # MPQ7920
Description  5V PMIC with Four 2A/2.5A/4.5A/4.5A Buck Converters, 5 LDOs, and Flexible System Settings via I2C and MTP, AEC-Q100
PDF  44 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MPQ7920 Datasheet(HTML) 21 Page - Monolithic Power Systems

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MPQ7920
– 5V POWER MANAGEMENT IC WITH I2C AND MTP, AEC-Q100
MPQ7920 Rev. 1.0
www.MonolithicPower.com
21
7/13/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
For the four 4-channel buck outputs, the soft-
start times are MTP-adjustable. For the LDO2
through LDO5 outputs, the soft-start times are
internally fixed at 50µs. For LDORTC, the soft-
start slew rate is consistent at 25mV/µs.
Output Discharge
In order to discharge the output capacitor during
the power-off sequence, there is a passive
discharge path from the DC/DC
converters’ and
LDOs’ output to ground. The discharge path is
turned on when its corresponding channel is
disabled. The t
ypical discharge resistance is 7Ω.
The discharge function can be enabled or
disabled through the I2C interface.
Over-Voltage Protection (OVP)
The MPQ7920 monitors the feedback voltage to
detect an over-voltage condition. When the
feedback voltage exceeds 120% of the target
voltage, the controller turns off both the high-side
MOSFET (HS-FET) and low-side MOSFET (LS-
FET), and the discharge path is turned on. The
part exits this regulation period once the
feedback voltage falls below 110% of the
reference voltage.
Over-Current Protection (OCP)
If the peak inductor current reaches its limit (set
via the I2C registers) when the HS-FET is on,
OCP is triggered. The LS-FET is forced on until
the inductor current drops to the valley current
limit; then the HS-FET turns on again. The part
does not exit OCP unless the inductor peak
current falls below the limit. If the OCP time lasts
for longer than 150µs (typical), the buck enters
hiccup mode.
System Control Signals
PWRON Functions
PWRON is an input pin to the IC that generates
a power-on or power-off event. This pin can be
configured to detect a level or a falling edge via
the MTP.
When
the
PWRON_MODE
bit
=
1,
the
PWRON_DEBOUNCE_TIMER bit can set the
PWRON pin
’s debounce timer to filter out
mechanical switch short press noise.
When the PWRON_MODE bit = 0, PWRON
works as an enable pin. Apply a logic high
voltage to turn the PMIC on; apply a logic low
voltage to turn the PMIC off.
PWRON_MODE = 1 (Edge Trigger)
Power On
If AVIN is above the UVLO threshold and
PWRON is asserted low for
longer than
PWRON_DEBOUNCE_TIMER when the PMIC
is powered off, the power-on sequence begins.
The power-on sequence must complete, and
then the PWRON detection function is re-
enabled.
Power Off
If
PWRON
asserts
low
for
longer
than
PWRON_DEBOUNCE_TIMER when the device
is powered on, the power-off sequence begins.
The MPQ7920 turns off all regulators and LDOs
(except OUTRTC). The power-off sequence is
pre-programmed by the MTP e-fuse.
..
OUT1
OUT4
RSTO
PWRON
0
Debounce Timer
Remains in the power on-state
when PWRON stays low
Figure 7: PWRON_MODE = 1, Press PWRON to Power On
If the PWRON pin is still pulled low after the
power-off sequence completes, the MPQ7920
remains in its power off state. If the PWRON pin is
pulled
high
after
the
power-off
sequence
completes, the MPQ7920 continues the power-off
sequence.



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