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DAC39RF10 Datasheet(PDF) 199 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 199 Page - Texas Instruments |
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199 / 232 page  disabled, low level spurs from the disabled channel can feed into the active channel, creating spurs around -80 dBFS. The TX ENABLE function, either through the TXEN0/1 balls or TX_EN registers, provides a method to quickly disable the DAC output by forcing the digital code to 0 (midscale) (see Section 6.9 for the TX ENABLE latency). When the QUITE_TX_ENABLE register is 0, a low level signal is still maintained at the output to prevent saturation. When QUITE_TX_ENABLE is 1, if data independent DEM and Dither is enable, this prevents asymmetric aging. If DEM and dither are disabled or DEM is set to data dependent DEM, the DAC can degrade over the lifetime of the device if a significant faction of the lifetime is spent in this mode. The degradation is channel specific, only affecting the channel that is disabled. Table 9-1. DAC Sleep and Output Disable Options Option MXMODE TX_EN QUIET_TX_DISABLE DEM DITHER Low level output long term degradation Power Savings Device Full Power Down (MODE = 0b11) - - - - - yes no Most DAC disable 6 1 - - - yes no Some TX Enable any 0 0 - - yes no Least TX Enable 0-5 0 1 0,1 0,1 no no Least TX Enable 0-5 0 1 2, 3 3 no yes Least TX Enable 6 0 1 0,1 0,1 no no Least TX Enable 6 0 1 2,3 3 no yes Least When the DAC is in full power down, the common mode voltage at the DAC output during sleep needs to be maintained below 2V. For AC coupled outputs, the bias is usually provided by an inductor or a balun center tap to 1.8V which forces the common mode also to 1.8V. For DC coupled output, which are typically terminated through a resistor to a voltage above 1.8V (for example, 2.3V), sufficient DAC output current must be provided to reduce the common mode voltage to less than 2V. This is achieved by programming DACx_CBIAS_SLEEP (Address 0x724 bits 7:4 for DACA and Address 0x726 bits 7:4 for DACB) according to the following equation: DAC_CBIAS_SLEEP = ceil 2∙VBIAS−VOUT_CM_SLEEP RTERM − 7.36mA 1.47mA (4) where: • VOUT_SLEEP is the DAC output common mode in sleep (≤ 2V) • VBIAS is the external DC bias • RTERM is the external bias resistor/termination to VBIAS • ceil is the ceiling operator (integer round up) 9.1.7 Radiation Environment Recommendations Careful consideration must be given to the environmental conditions when using a product in a radiation environment. Table 9-2 provides a summary of radiation tolerance for device features. Table 9-2. Summary of Radiation Tolerance Feature Radiation Tolerance Writable SPI registers (excluding write-to-clear registers) Implemented with upset immune flip flops. Radiation does not alter the state. Read-only SPI registers that return constant values Radiation does not alter the state (that is, CHIP_TYPE, CHIP_ID, CHIP_VERSION, VENDOR_ID) www.ti.com DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 199 Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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