C8051F310 datasheet(199/228 Pages) SILABS

199 / 228 page

Rev. 1.7

199

C8051F310/1/2/3/4/5/6/7

17.3. Timer 3

Timer 3 is a 16-bit timer formed by two 8-bit SFRs: TMR3L (low byte) and TMR3H (high byte). Timer 3 may

operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T3SPLIT bit (TMR3CN.3) defines

the Timer 3 operation mode.

Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator

source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the

internal oscillator drives the system clock while Timer 3 (and/or the PCA) is clocked by an external preci-

sion oscillator. Note that the external oscillator source divided by 8 is synchronized with the system clock.

17.3.1. 16-bit Timer with Auto-Reload

When T3SPLIT (TMR3CN.3) is zero, Timer 3 operates as a 16-bit timer with auto-reload. Timer 3 can be

clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the

16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 3

reload registers (TMR3RLH and TM32RLL) is loaded into the Timer 3 register as shown in Figure 17.4,

and the Timer 3 High Byte Overflow Flag (TMR3CN.7) is set. If Timer 3 interrupts are enabled, an interrupt

will be generated on each Timer 3 overflow. Additionally, if Timer 3 interrupts are enabled and the TF3LEN

bit is set (TMR3CN.5), an interrupt will be generated each time the lower 8 bits (TMR3L) overflow from

0xFF to 0x00.

Figure 17.6. Timer 3 16-Bit Mode Block Diagram

External Clock / 8

SYSCLK / 12

SYSCLK

TMR3L

TMR3H

TMR3RLL TMR3RLH

Reload

TCLK

TR3

T3SPLIT

TF3L

TF3H

T3XCLK

TR3

T3XCLK

Interrupt

TF3LEN

To ADC

CKCON

C8051F310 Datasheet(PDF) 199 Page - Silicon Laboratories