DA7212 datasheet(61/136 Pages) RENESAS

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Ultra-Low Power Stereo Codec

DA7212 Revision 3.6

Nov 1, 2024

CFR011-120-00

Page 61

13.33 Digital Audio Interface (DAI)

DA7212 provides a Digital audio interface (DAI) to input DAC data or to output ADC data. It is enabled by

asserting DAI_EN. The DSP provides flexible routing options allowing each interface to be connected to different

signal paths as desired in each application.

The DAI consists of a four-wire serial interface, with bit clock (BCLK), word clock (WCLK), data-in (DATIN) and

data-out (DATOUT) pins. Both Master and Slave clock modes are supported by the DA7212 . Master mode is

enabled setting register DAI_CLK_EN (0x28[7]) = 1. In Master mode, the bit clock and word clock signals are

outputs from the codec. In Slave mode these are inputs to the codec.

DA7212

Codec

Processor

BCLK

WCLK

DATIN

DATOUT

Figure 27. Master mode (DAI_CLK_EN = 1)

DA7212

Codec

Processor

BCLK

WCLK

DATIN

DATOUT

Figure 28. Slave mode (DAI_CLK_EN = 0)

The internal serialized DAI data is 24 bits wide. Serial data that is not 24 bits wide is either shortened or zero-

filled at input to, or at output from, the DAI’s internal 24-bit data width. The serial data word length can be

configured to be 16, 20, 24 or 32 bits wide using the DAI_WORD_LENGTH register bits.

Four different data formats are supported by the digital audio interface. The data format is determined by the

setting of the DAI_FORMAT register bits.

▪ I2S mode

▪ Left Justified mode

▪ Right Justified mode

▪ DSP mode

Time division multiplexing (TDM) is available in any of these modes to support the case where multiple devices

are communicating simultaneously on the same bus. TDM is enabled by asserting the DAI_TDM_MODE_EN bit.

DA7212 Datasheet(PDF) 61 Page - Renesas Technology Corp