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DA7212 Datasheet(PDF) 86 Page - Renesas Technology Corp |
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DA7212 Datasheet(HTML) 86 Page - Renesas Technology Corp |
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86 / 136 page ![]() Ultra-Low Power Stereo Codec DA7212 Revision 3.6 Nov 1, 2024 CFR011-120-00 Page 86 Register address Bit Type Label Default Description 0x2A DIG_ROUTING_DAC 7 R/W DAC_R_MONO 0 When asserted, the DAI right input stream is replaced with a mono mix of left and right 0 = Right input stream 1 = Mono mix of left and right input streams 6 R/W (reserved) 0 5:4 R/W DAC_R_SRC 11 Data select to the DAC_R path: 00 = ADC left output 01 = ADC right output 10 = Determined by DAC_L_MONO (bit [3] of this register) 11 = Determined by DAC_R_MONO (bit [7] of this register) Note: The beep generator is omited from the signal path if this is set to ‘00’ or ‘01’ 3 R/W DAC_L_MONO 0 When asserted, the DAI left input stream is replaced with a mono mix of left and right 0 = Left input stream 1 = Mono mix of left and right input streams 2 R/W (reserved) 0 1:0 R/W DAC_L_SRC 10 Data select to the DAC_L path: 00 = ADC left output 01 = ADC right output 10 = Determined by DAC_L_MONO (bit [3] of this register) 11 = Determined by DAC_R_MONO (bit [7] of this register) The beep generator is omited from the signal path if this is set to ‘00’ or ‘01’ |
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