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LXT9782 Datasheet(PDF) 30 Page - Intel Corporation |
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LXT9782 Datasheet(HTML) 30 Page - Intel Corporation |
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30 / 78 page ![]() LXT9762/9782 — Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII 30 Datasheet • Allows a multi-port MAC/PHY communication with one system clock. • Operates in both half and full duplex. • Supports per-packet switching between 10 Mbps and 100 Mbps data rates. The Serial MII operates at 125 MHz using a global reference clock and frame synchronization signal (REFCLK and SYNC). Each port has an individual two-line data interface (TXDn and RXDn). All signals are synchronous to REFCLK. Figure 13 is a simple SMII block diagram and Table 10 summarizes the SMII signals. Data is exchanged in 10-bit serial words. Each word contains one data byte (two nibbles of 4B coded data) and two status bits. When the port is operating at 100 Mbps, each word contains a new data byte. When the port is operating at 10 Mbps, each data byte is repeated 10 times. Table 10. SMII Signal Summary Signal To From Purpose TXD PHY MAC Receive data & control RXD MAC PHY Transmit data & control SYNC PHY MAC Synchronization REFCLK MAC & PHY System Synchronization 1. Refer to Table 1 on page 13 for detailed signal descriptions. Figure 13. Simplified SMII Application Diagram 16 Port MAC Clock LXT9782 LXT9782 8 8 8 8 TX RX SYNC TX RX SYNC CLOCK |
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